PAPS: Power budget-Aware Pipeline Scheduling for an Embedded ReRAM-based Accelerator

Many recent works have proposed to embed the emerging resistive switching random-access memory crossbar (ReRAM for short) to an edge device in Internet of Things (IoTs), such that those IoT nodes themselves are smart to process data rather than merely transmit raw data [1]. To acquire high throughput, multiple ReRAMs are scheduled in a pipeline fashion in the execution, but the peak power consumption of the ReRAM pipeline may probably exceed its power budget. Addressing the power issue, this paper proposes a Power budget-Aware Pipeline Scheduling (PAPS) scheme, which can achieve a well balanced and low power ReRAM pipeline.