High-Speed PCAP Configuration Scrubbing on Zynq-7000 All Programmable SoCs

被引:15
|
作者
Stoddard, Aaron [1 ]
Gruwell, Ammon [1 ]
Zabriskie, Peter [1 ]
Wirthlin, Michael [1 ]
机构
[1] Brigham Young Univ, Dept Elect & Comp Engn, NSF Ctr High Performance Reconfigurable Comp CHRE, Provo, UT 84602 USA
来源
2016 26TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL) | 2016年
基金
美国国家科学基金会;
关键词
SEU; DESIGN;
D O I
10.1109/FPL.2016.7577301
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Configuration scrubbing is a technique used for repairing Single Event Upsets (SEUs) within the configuration memory of an FPGA. Scrubbing approaches have been developed using hardware external to the FPGA communicating through a configuration port and using hardware within the FPGA by communicating with an internal configuration port (ICAP). More recent FPGAs such as the Xilinx Zynq 7-Series SoCs provide internal programmable processors that can configure the FPGA logic very rapidly using an internal Processor Configuration Access Port (PCAP). These SoC/FPGAs also provide automatic internal scrubbing through the use of high-speed readback and configuration error correction. This paper presents a novel form of FPGA configuration scrubbing for the Zynq-7000 SoC family by combining the highspeed PCAP configuration port with internal scrubbing. This novel scrubber corrects single-bit upsets in several microseconds and detects these upsets in 8 ms.
引用
收藏
页数:8
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