Physical compact model for threshold voltage in short-channel double-gate devices

被引：0
|
作者：
Kim, K [1 ]
Fossum, JG [1 ]
Chuang, CT [1 ]
机构：
[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
来源：
2003 IEEE INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES | 2003年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Compact physics/process-based model for threshold voltage in double-gate devices is presented. Drain-induced barrier lowering and short-channel-induced barrier lowering models for double-gate and bulk-Si devices are derived. The validity and predictability of the models are demonstrated and confirmed by numerical device simulation results for extremely scaled (L-eff = 25 nm) double-gate and bulk-Si devices.
引用
收藏
页码：223 / 226
页数：4
相关论文
共 50 条
  • [1] Compact model of the quantum short-channel threshold voltage in symmetric Double-Gate MOSFET
    Munteanu, D
    Autran, JL
    Harrison, S
    Nehari, K
    Tintori, O
    Skotnicki, T
    MOLECULAR SIMULATION, 2005, 31 (12) : 831 - 837
  • [2] A physical short-channel threshold voltage model for undoped symmetric double-gate MOSFETs
    Chen, QA
    Harrell, EM
    Meindl, JD
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (07) : 1631 - 1637
  • [3] Threshold voltage model for short-channel undoped symmetrical double-gate MOSFETs
    Tsormpatzoglou, Andreas
    Dimitriadis, Charalabos A.
    Clerc, Raphael
    Pananakakis, G.
    Ghibaudo, Gerard
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (09) : 2512 - 2516
  • [4] Quantum short-channel compact model for the threshold voltage in double-gate MOSFETs with high-permittivitty gate dielectrics
    Munteanu, D
    Autran, JL
    Harrison, S
    JOURNAL OF NON-CRYSTALLINE SOLIDS, 2005, 351 (21-23) : 1911 - 1918
  • [5] An Analytic Potential and Threshold Voltage Model for Short-Channel Symmetric Double-Gate MOSFET
    Yadav, Vimal Kumar Singh
    Baruah, Ratul Kr
    18TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST, 2014,
  • [6] Symmetrical unified compact model of short-channel double-gate MOSFETs
    Papathanasiou, K.
    Theodorou, C. G.
    Tsormpatzoglou, A.
    Tassis, D. H.
    Dimitriadis, C. A.
    Bucher, M.
    Ghibaudo, G.
    SOLID-STATE ELECTRONICS, 2012, 69 : 55 - 61
  • [7] Compact model for short-channel symmetric double-gate junctionless transistors
    Avila-Herrera, F.
    Cerdeira, A.
    Paz, B. C.
    Estrada, M.
    Iniguez, B.
    Pavanello, M. A.
    SOLID-STATE ELECTRONICS, 2015, 111 : 196 - 203
  • [8] Analytical threshold voltage model for short-channel asymmetrical dual-gate material double-gate MOSFETs
    Tsormpatzoglou, A.
    Pappas, I.
    Tassis, D. H.
    Dimitriadis, C. A.
    Ghibaudo, G.
    MICROELECTRONIC ENGINEERING, 2012, 90 : 9 - 11
  • [9] A general physical model for short-channel double-gate SOI MOSFETS
    Li, ZM
    Woo, JCS
    1997 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 1996, : 86 - 87
  • [10] Analytical Modeling of RDF Effects on the Threshold Voltage in Short-Channel Double-Gate MOSFETs
    Graef, Michael
    Hain, Franziska
    Hosenfeld, Fabian
    Horst, Fabian
    Farokhnejad, Atieh
    Iniguez, Benjamin
    Kloes, Alexander
    PROCEEDINGS OF THE 24TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - MIXDES 2017, 2017, : 127 - 131
12345