Modeling and simulation of digital recombination network for 2-1-1 cascaded doubled-sampled delta-sigma modulator

被引:0
|
作者
Salinas-Cruz, R [1 ]
Espinosa-Flores, G [1 ]
机构
[1] Benemerita Univ Autonoma, Puebla, Mexico
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A mathematical model of the digital recombination network for 2-1-1 cascaded double-sampled (dS) delta-sigma (Delta Sigma) modulator, is presented. The model in the z-domain is used to evaluate the performance of the modulator, when the components mismatches are included. A 2-1-1 dS Delta Sigma modulator that operates from a single 2.5-V supply is designed in 0.6-mu m CMOS technology. The clock frequency is of 26.4 MHz, making the effective sampling of 52.8 MHz, which results in the required signal bandwidth for Asymmetrical Digital Subscriber Line (ADSL) applications of 1.1 MHz. The modulator is evaluated with the mathematical model using MATLAB, and for an oversampling of 24, the modulator achieves a signal-to-noise ratio (SNR) of 88-dB, a signal-to-(noise + distortion) ratio (SNDR) of 84-dB, and a dynamic range (DR) of 91-dB.
引用
收藏
页码:195 / 199
页数:5
相关论文
共 50 条
  • [31] Digital Noise-Cancellation Circuit Implementation Using Proposed Algorithm and Karnaugh Map in a MASH 2-1 Delta-Sigma Modulator
    Xiao, Xiong
    Huang, Chong-Cheng
    Sung, Guo-Ming
    Lee, Chun-Ting
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2022, 31 (10)
  • [32] 1-bit Band-Pass Delta-Sigma Modulator with Parallel IIR Form for Concurrent Multiband Digital Transmitter
    Maehata, Takashi
    Kameda, Suguru
    Suematsu, Noriharu
    IEICE TRANSACTIONS ON COMMUNICATIONS, 2017, E100B (07) : 1152 - 1159
  • [33] Concurrent Dual-band 1-bit Digital Transmitter Using Band-Pass Delta-Sigma Modulator
    Maehata, Takashi
    Totani, Kazuyuki
    Kameda, Suguru
    Suematsu, Noriharu
    2013 EUROPEAN MICROWAVE CONFERENCE (EUMC), 2013, : 1523 - 1526
  • [34] Concurrent Dual-band 1-bit Digital Transmitter Using Band-Pass Delta-Sigma Modulator
    Maehata, Takashi
    Totani, Kazuyuki
    Kameda, Suguru
    Suematsu, Noriharu
    2013 8TH EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC), 2013, : 552 - 555
  • [35] Modeling continuous-time delta-sigma modulator in MATLAB SIMULINK for system-level simulation and specification translation
    Webb, Matthew
    Tang, Hua
    WSEAS Transactions on Circuits and Systems, 2006, 5 (12): : 1760 - 1767
  • [36] A K-Delta-1-Sigma Modulator for Wideband Analog to Digital Conversion
    Saxena, Vishal
    Li, Kaijun
    Zheng, Geng
    Baker, R. Jacob
    2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2009, : 411 - 414
  • [37] A Novel Channel Coding Scheme for Digital RF Transmitter Comprising a 1-bit Band-Pass Delta-Sigma Modulator
    Maehata, Takashi
    Kameda, Suguru
    Suematsu, Noriharu
    2014 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC), 2014,
  • [38] A 0.5-V Wideband Amplifier for a 1-MHz CT Complex Delta-Sigma Modulator
    He, Xiao-Yong
    Pun, Kong-Pang
    Kinget, Peter
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2009, 56 (11) : 805 - 809
  • [39] 2-1 Switched-current multi-stage noise-shaping delta-sigma modulator with a digital noise-cancellation circuit
    Gunnam, Leenendra Chowdary
    Sung, Guo-Ming
    Weng, Lei-Wen
    Fan, Te-Chia
    IET CIRCUITS DEVICES & SYSTEMS, 2019, 13 (03) : 327 - 336
  • [40] 4TH-ORDER 2-STAGE DELTA-SIGMA MODULATOR USING BOTH 1 BIT AND MULTIBIT QUANTIZERS
    TAN, N
    ERIKSSON, S
    ELECTRONICS LETTERS, 1993, 29 (11) : 937 - 938