Highly manufacturable 90 nm DRAM technology

被引：0

作者：

Park, YK ^{[1
]}

Cho, CH ^{[1
]}

Lee, KH ^{[1
]}

Roh, BH ^{[1
]}

Ahn, YS ^{[1
]}

Lee, SH ^{[1
]}

Oh, JH ^{[1
]}

Lee, JG ^{[1
]}

Kwak, DH ^{[1
]}

Shin, SH ^{[1
]}

Bae, JS ^{[1
]}

Kim, SB ^{[1
]}

Lee, JK ^{[1
]}

Lee, JY ^{[1
]}

Kim, MS ^{[1
]}

Lee, JW ^{[1
]}

Lee, DJ ^{[1
]}

Hong, SH ^{[1
]}

Bae, DI ^{[1
]}

Chun, YS ^{[1
]}

Park, SH ^{[1
]}

Yun, CJ ^{[1
]}

Chung, TY ^{[1
]}

Kim, K ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Technol Dev, Semicond R&D Div, Yongin 449900, Kyunggi Do, South Korea

来源：

INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST | 2002年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A 90 nm DRAM technology has been successfully developed using 512Mb DRAM for the first time. ArF lithography is used for printing critical layers with resolution enhancement techniques. A novel gap-filling technology using spin coating oxide is developed for STI and ILD processes. Diamond-shaped storage node is newly developed for large capacitor area with better mechanical stability. A CVD Al process can make back-end metallization process simple and easy. Dual gate oxide scheme can provide independent optimization for memory cell transistor and periphery support device so that the off-state leakage current of cell transistor can be maintained below 0.1 fA.

引用

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页码：819 / 822

页数：4

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