共 50 条
- [1] Solder joint behavior of area array packages in board level drop for handheld devices 53RD ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2003 PROCEEDINGS, 2003, : 130 - 135
- [2] On hermeticity detection of wafer level packages for MEMS devices ADVANCES IN ELECTRONIC PACKAGING 2005, PTS A-C, 2005, : 2063 - 2067
- [3] Board Level Reliability Improvement in eWLB (Embedded Wafer Level BGA) Packages 2016 11TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT-IAAC 2016), 2016, : 139 - 142
- [4] JEDEC Board Drop Test Simulation for Wafer Level Packages (WLPs) 2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, : 556 - +
- [5] Board Level Reliability of Wafer Level Chip Scale Packages With Copper Post Technology IEMT 2006: 31ST INTERNATIONAL CONFERENCE ON ELECTRONICS MANUFACTURING AND TECHNOLOGY, 2006, : 155 - 161
- [7] SACQ Solder Board Level Reliability Evaluation and Life Prediction Model for Wafer Level Packages 2017 IEEE 67TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2017), 2017, : 1058 - 1064
- [8] The bumping of wafer level packages FIFTH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, PROCEEDINGS, 2003, : 206 - 220
- [9] Quantitative Reliability Prediction Model for Wafer Level Packages under Board-Level Temperature Cycling 2014 9TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2014, : 325 - 328