NEURAL SPIKE DETECTION BASED ON 1T1R MEMRISTOR

被引：0

作者：

Liu, Zhengwu ^{[1
]}

Tang, Jianshi ^{[1
]}

Gao, Bin ^{[1
]}

Qian, He ^{[1
]}

Wu, Huaqiang ^{[1
]}

机构：

[1] Tsinghua Univ, Beijing Innovat Ctr Future Chips ICFC, Beijing Natl Res Ctr Informat Sci & Technol BNRis, Inst Microelect, Beijing 100084, Peoples R China

来源：

2020 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2020 (CSTIC 2020) | 2020年

关键词：

D O I：

10.1109/cstic49141.2020.9282494

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Neural spike detection is an important step to study the working principles of the brain and construct useful neuroprosthetics for patients with neurological diseases. However, the high power consumption of conventional electronic hardware hinders the way towards highly efficient neuroprosthetics. In this paper, an energy-efficient neural spike detector based on 1T1R memristor is presented. 69.12% TPR and 19.35% FPR can be achieved when benchmarked with a conventional method. Compared with traditional neural spike detectors, our memristor-based spike detector has shown significant advantages in both power consumption (84.5 nW compared to 815 nW in conventional hardware) and data transmission bandwidth (similar to 200x compression of raw data).

引用

页数：3

共 50 条

[31] Type synthesis approach for 2-DOF 1T1R parallel mechanisms based on POC
Li, Ju
Yin, Hongbo
Shen, Huiping
Dai, Lifang
Ma, Xiaomeng
Deng, Jiaming
[J]. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2014, 8918 : 89 - 99
[32] Radiation hard design of HfO2 based 1T1R cells and memory arrays
Grossi, Alessandro
Calligaro, Cristiano
Perez, Eduardo
Schmidt, Jens
Teply, Florian
Mausolf, Thomas
Zambelli, Cristian
Olivo, Piero
Wenger, Christian
[J]. 2015 INTERNATIONAL CONFERENCE ON MEMRISTIVE SYSTEMS (MEMRISYS), 2015,
[33] Highly Parallel Writing Strategy Based on Diagonal-Gates-Connection 1T1R Arrays
Tong, Peiwen
Wang, Wei
Xu, Hui
Sun, Yi
Wang, Yongzhou
Liu, Sen
Zhang, Yufei
Liao, Cen
Chen, Changlin
Li, Qingjiang
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (12) : 6693 - 6698
[34] Effect of Transistor Transfer Characteristics on the Programming Process in 1T1R Configuration
Liu, Xiaohua
Bengel, Christopher
Cueppers, Felix
Solfronk, Oliver
Zhang, Bojian
Hoffmann-Eifert, Susanne
Menzel, Stephan
Waser, Rainer
Wiefels, Stefan
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2024, 71 (04) : 2423 - 2430
[35] Uniformity Improvement in 1T1R RRAM With Gate Voltage Ramp Programming
Liu, Hongtao
Lv, Hangbin
Yang, Baohe
Xu, Xiaoxin
Liu, Ruoyu
Liu, Qi
Long, Shibing
Liu, Ming
[J]. IEEE ELECTRON DEVICE LETTERS, 2014, 35 (12) : 1224 - 1226
[36] An On-line Test Strategy and Analysis for a 1T1R Crossbar Memory
Escudero-Lopez, Manuel
Moll, Francesc
Rubio, Antonio
Vourkas, Ioannis
[J]. 2017 IEEE 23RD INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS), 2017, : 120 - 125
[37] In-Memory Hamming Weight Calculation in a 1T1R Memristive Array
Cheng, Long
Li, Jiancong
Zheng, Hao-Xuan
Yuan, Peng
Yin, Jiahao
Yang, Ling
Luo, Qing
Li, Yi
Lv, Hangbing
Chang, Ting-Chang
Miao, Xiangshui
[J]. ADVANCED ELECTRONIC MATERIALS, 2020, 6 (09):
[38] Finite State Automata Design using 1T1R ReRAM Crossbar
Singh, Simranjeet
Ghazal, Omar
Jha, Chandan Kumar
Rana, Vikas
Drechsler, Rolf
Shafik, Rishad
Yakovlev, Alex
Patkar, Sachin
Merchant, Farhad
[J]. 2023 21ST IEEE INTERREGIONAL NEWCAS CONFERENCE, NEWCAS, 2023,
[39] On the design and analysis of a compact array with 1T1R RRAM memory element
Mbarek, Khaoula
Rziga, Faten Ouaja
Ghedira, Sami
Besbes, Kamel
[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2020, 102 (01) : 27 - 37
[40] On the design and analysis of a compact array with 1T1R RRAM memory element
Khaoula Mbarek
Faten Ouaja Rziga
Sami Ghedira
Kamel Besbes
[J]. Analog Integrated Circuits and Signal Processing, 2020, 102 : 27 - 37

← 1 2 3 4 5 →