Modified Booth encoding modulo (2n-1) multipliers

被引:6
|
作者
Li, Lei [1 ]
Hu, Jianhao [2 ]
Chen, Yiou [2 ]
机构
[1] Univ Elect Sci & Technol China, Res Inst Elect Sci & Technol, Chengdu 611731, Sichuan, Peoples R China
[2] Univ Elect Sci & Technol China, Natl Key Lab Sci & Technol Commun, Chengdu 611731, Sichuan, Peoples R China
来源
IEICE ELECTRONICS EXPRESS | 2012年 / 9卷 / 05期
基金
中国国家自然科学基金;
关键词
Residue Number Systems (RNS); multiplier;
D O I
10.1587/elex.9.352
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
(2(n) - 1) is one of the most commonly used moduli in Residue Number Systems. In this express, we propose a novel Booth encoding architecture. Based on the proposed Booth encoding architecture, we can design high speed and high-efficient modulo (2(n) - 1) multipliers, which are the fastest among all known modulo (2(n) - 1) multipliers. The performance and the efficiency of the proposed multipliers are evaluated and compared with the earlier fastest modulo (2(n) - 1) multipliers, based on a simple gate-count and gate-delay model. These results reveal that the proposed multipliers lead to average approximately 14% faster than the fastest known modulo (2(n) - 1) multipliers.
引用
收藏
页码:352 / 358
页数:7
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