Verification of IP-Core based SoC's

被引:0
|
作者
Deshpande, Anil
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
With rapid strides in Semiconductor processing technologies, the density of transistors on the die is increasing in line with Moore's law which in turn is increasing the complexity of the whole SoC design. With manufacturing yield and time-to-market schedules crucial for a SoC, it is important to select verification and analysis solutions that offer best possible performance, while minimizing iteration time and data volume. With the advent of cutting edge technology applications like set top boxes, HDTV, an increasingly evident need has been that of incorporating the SoC the whole system - on a single silicon i.e., Silicon On Chip (SoC) using standard IP-Cores. In an IP-Core based SoC design, a streamlined verification and analysis flow can contribute significantly to the success of a product. A strategy is devised for a more streamlined approach in IP-core based SoC verification which helps in smooth transition from design to chip tape-out stage.
引用
收藏
页码:433 / 436
页数:4
相关论文
共 50 条
  • [21] 10 Gb/s IP-core for a 100 Gb/s in-line network security processor
    Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing
    100084, China
    Qinghua Daxue Xuebao, 9 (1230-1235):
  • [22] A fault tolerant on-line bisted SRAM IP-Core
    Pedram, A
    Forouzandeh, B
    Sobhani, A
    Sedaghati-Mokhtari, N
    17th ICM 2005: 2005 International Conference on Microelectronics, Proceedings, 2005, : 256 - 259
  • [23] GPIB控制器的IP-core设计
    许诚昕
    化工自动化及仪表, 2012, 39 (04) : 508 - 510
  • [24] SEE Detection and Mitigation Strategy for GNSS Coprocessor IP-Core
    Gabriel Diaz, Juan
    Gonzalo Garcia, Javier
    2021 IEEE URUCON, 2021, : 213 - 216
  • [25] PCA IP-Core for Gas Applications on the Heterogenous Zynq Platform
    Ali, Amine Ait Si
    Amira, Abbes
    Bensaali, Faycal
    Benammar, Mohieddine
    2013 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS (ICM), 2013,
  • [26] Method of Free C plus plus Code Migration Between SoC Level Tests and Standalone IP-Core UVM Environments
    Putrya, Fedor
    2014 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS), 2014,
  • [27] A Web-CAD methodology for IP-core analysis and simulation
    Fin, A
    Fummi, F
    37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000, 2000, : 597 - 600
  • [28] An Efficient Median Filter in a Robot Sensor Soft IP-Core
    Mutauranwa, Liberty
    Nleya, Magripa
    AFRICON, 2013, 2013,
  • [29] Study on a mixed verification strategy for IP-based SoC design
    Chen Wenwei
    Zhang Jinyi
    Li Jiao
    Ren Xiaojun
    Liu Jiwei
    Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05), 2005, : 479 - 482
  • [30] Integrating ADC IP in a SoC and its verification
    Hu, Yueli
    Jing, Wenyi
    Liu, Ying
    HDP'07: PROCEEDINGS OF THE 2007 INTERNATIONAL SYMPOSIUM ON HIGH DENSITY PACKAGING AND MICROSYSTEM INTEGRATION, 2007, : 376 - +