GasP control for domino circuits

被引：4
|
作者：
Ebergen, J
Gainsley, J
Lexau, J
Sutherland, I
机构：
来源：
11TH IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS, PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/ASYNC.2005.21
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare favorably with previously published control circuits. We present some results from a chip implementation of several 64-bit domino adders in a TSMC CMOS 180 nm process technology.
引用
收藏
页码：12 / 22
页数：11
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