Experimental Analysis of Negative Temperature Bias Instabilities Degradation in Junctionless Nanowire Transistors

被引：0

作者：

Graziano Junior, N. ^{[1
]}

Trevisoli, R. ^{[2
]}

Barraud, S. ^{[3
]}

Doria, R. T. ^{[1
]}

机构：

[1] Ctr Univ FEI, Dept Elect Engn, Sao Bernardo Do Campo, Brazil

[2] Univ Fed Abc, Santo Andre, Brazil

[3] Commissariat Energie Atom & Energies Alternat, LETI, Grenoble, France

来源：

2018 33RD SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO) | 2018年

基金：

巴西圣保罗研究基金会;

关键词：

Junctionless Nanowire Transistors; Negative Bias Temperature Instabilities; NBTI; SOI Technology; MODEL;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In the present work, it is analyzed, for the first time, the degradation by Negative Bias Temperature Instability in Junctionless Nanowire Transistors (JNTs) through experimental measurements and three-dimensional numerical simulations. The experimental data was analyzed considering p-type JNTs devices with doping concentrations of 5 x 10(18) cm(-3) and 1 x 10(19) cm(-3) with different channel lengths from 50 nm up to 70 nm. The transistors were submitted to two different drain voltages (-0.05 V and -1.0 V), where it could be noted that transistors with lower concentrations present higher NBTI for the same bias condition. Through the numerical simulations it was possible to verify that this effect is related to the larger electric field presented by the structure with lower doping concentration.

引用

页数：4

共 50 条

[1] Correlation Between the Electric Field and the Negative Temperature Bias Instabilities Degradation in Junctionless Nanowire Transistors
Graziano Junior, N.
da Costa, F. J.
Trevisoli, R.
Doria, R. T.
2019 34TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO 2019), 2019,
[2] The Influence of the Substrate Bias in Junctionless Nanowire Transistors
Trevisoli, Renan D.
Doria, Rodrigo T.
de Souza, Michelly
Pavanello, Marcelo A.
2013 28TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO 2013), 2013,
[3] Substrate Bias Influence on the Operation of Junctionless Nanowire Transistors
Trevisoli, Renan
Doria, Rodrigo Trevisoli
de Souza, Michelly
Pavanello, Marcelo Antonio
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2014, 61 (05) : 1575 - 1582
[4] Negative-bias-temperature-instability and hot carrier effects in nanowire junctionless p-channel multigate transistors
Park, Jong Tae
Kim, Jin Young
Colinge, Jean Pierre
APPLIED PHYSICS LETTERS, 2012, 100 (08)
[5] The zero temperature coefficient in junctionless nanowire transistors
Trevisoli, Renan Doria
Doria, Rodrigo Trevisoli
de Souza, Michelly
Das, Samaresh
Ferain, Isabelle
Pavanello, Marcelo Antonio
APPLIED PHYSICS LETTERS, 2012, 101 (06)
[6] NBTI Dependence on Temperature in Junctionless Nanowire Transistors
Graziano Junior, N.
Trevisoli, R.
Doria, R. T.
35TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO2021), 2021,
[7] Experimental Assessment of Variability in Junctionless Nanowire nMOS Transistors
de Souza, Michelly
Barraud, Sylvain
Casse, Mikael
Vinet, Maud
Faynot, Olivier
Pavanello, Marcelo Antonio
IEEE 51ST EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2021), 2021, : 223 - 226
[8] Analysis of the leakage current in junctionless nanowire transistors
Trevisoli, Renan
Doria, Rodrigo Trevisoli
de Souza, Michelly
Pavanello, Marcelo Antonio
APPLIED PHYSICS LETTERS, 2013, 103 (20)
[9] Analysis of the Scattering Mechanisms in the Accumulation Layer of Junctionless Nanowire Transistors at High Temperature
Ribeiro, T. A.
Pavanello, M. A.
2019 34TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO 2019), 2019,
[10] Improved Analog Operation of Junctionless Nanowire Transistors Using Back Bias
Trevisoli, R.
Doria, R. T.
de Souza, M.
Pavanello, M. A.
2015 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS), 2015, : 265 - 268

← 1 2 3 4 5 →