A New Seven Level Symmetric Inverter with Reduced Number of Switches and DC Sources

被引:0
|
作者
Balamurugan, M. [1 ]
Prakash, Gnana M. [1 ]
Umashankar, S. [1 ]
机构
[1] VIT Univ, Sch Elect Engn, Vellore, Tamil Nadu, India
关键词
Multilevel inverters; PWM technique; Total harmonic distortion;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This Multilevel inverter technology has recently become known has a very important substitute in the area of high power medium voltage energy control. Though multilevel inverter has several advantages it has drawbacks like for higher levels more number of semiconductor switches needed this may lead to huge size and cost of the inverter is very high. So in order to overcome this problem a new multilevel inverter is proposed with reduced number of switches. The proposed topology has three Dc sources and six Switches and it is well suited for high power applications. Level shifted PWM technique is used to generate the sine wave for the proposed topology. The Circuit is simulated in Matlab/Simulink and effect of harmonic spectrum is analyzed through the Fast Fourier transform window. The performance parameters of the proposed multilevel inverter are compared with the conventional MLI and another seven level existing topologies.
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页数:6
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