Reconfigurable circuits design based on DG-CNTFET transistors

被引:0
|
作者
Ghabri, Houda [1 ]
ben Issa, Dalenda [1 ]
Samet, Hekmet [1 ]
机构
[1] Univ Sfax, Natl Sch Engn Sfax, LETI Lab, BP 3038, Sfax, Tunisia
关键词
Ambipolar devices; double gate CNTFET; DG-CNTFET modeling; reconfigurable logic design;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Controllable-polarity transistors have an interesting property, they can switch from p-to n- type behavior and vice-versa dynamically. This opens up the opportunity for building novel and complex functions in fine-grain reconfigurable logic inaccessible to MOSFETs. Double-gate carbon nanotube field effect transistors (DG-CNTFETs) is one of the major promising candidate for reconfigurable circuit reaching a good performance levels. In this paper we will demonstrate the benefit of designing a reconfigurable circuit based on a compact physical model of these transistor. First, an overview of different types of carbon nanotube field-effect transistor (CNTFET) is given. DG-CNTFET model is described and characterization of transistor is done. Finally a dynamically reconfigurable 8-function logic gate (CNT-DR8F) based on a (DG-CNTFET) is described, simulated and analyzed.
引用
收藏
页码:677 / 680
页数:4
相关论文
共 50 条
  • [31] Performance Analysis of CNTFET Based Digital Logic Circuits
    Shreya, Sonal
    Chandel, Rajeevan
    2014 STUDENTS CONFERENCE ON ENGINEERING AND SYSTEMS (SCES), 2014,
  • [32] Design Techniques for Passive Planar Reconfigurable RF Circuits: Reconfigurable RF Circuits
    Zaidi, Aijaz M.
    Kanaujia, Binod K.
    Kishor, Jugul
    Singhwal, Sumer Singh
    Kaim, Vikrant
    Kumar, Amit
    Rambabu, Karumudi
    Rengarajan, Sembiam R.
    IEEE MICROWAVE MAGAZINE, 2024, 25 (09) : 29 - 42
  • [33] Design and implementation of control circuits based on dynamically reconfigurable FPGA
    Sklyarov, Valery
    de Brito Ferrari, Antonio
    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, 1998, 1 : 527 - 530
  • [34] CNTFET and RRAM Based Low Power Design of Unbalanced Ternary Logic Gates and Arithmetic Circuits
    Khurshid, Tabassum
    Singh, Vikram
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2024, 33 (05)
  • [35] Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors
    Rai, Shubham
    Trommer, Jens
    Raitza, Michael
    Mikolajick, Thomas
    Weber, Walter M.
    Kumar, Akash
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 27 (03) : 560 - 572
  • [36] Two-dimensional transistors with reconfigurable polarities for secure circuits
    Peng Wu
    Dayane Reis
    Xiaobo Sharon Hu
    Joerg Appenzeller
    Nature Electronics, 2021, 4 : 45 - 53
  • [37] Two-dimensional transistors with reconfigurable polarities for secure circuits
    Wu, Peng
    Reis, Dayane
    Hu, Xiaobo Sharon
    Appenzeller, Joerg
    NATURE ELECTRONICS, 2021, 4 (01) : 45 - 53
  • [38] Performance Evaluation of CNTFET-Based Digital Circuits: A Review
    Marani, R.
    Perri, A. G.
    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2020, 9 (05)
  • [39] Reliability Estimation of CNTFET-based Combinational Logic Circuits
    Jahanirad, Hadi
    Hosseini, Mostafa
    2020 28TH IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE), 2020, : 55 - 59
  • [40] An Almost Fully RRAM-Based LUT Design for Reconfigurable Circuits
    Grothe, Philipp
    Mulhem, Saleh
    Berekovic, Mladen
    APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2023, 2023, 14251 : 322 - 337