共 50 条
- [31] FSimGEO: A test generation method for path delay fault test using fault simulation and genetic optimization 14TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2001, : 225 - 229
- [32] Generation of tests for the localization of single gate design errors in combinational circuits using the stuck-at fault model XI BRAZILIAN SYMPOSIUM ON INTEGRATED CIRCUIT DESIGN, PROCEEDINGS, 1998, : 51 - 54
- [34] On improving the stuck-at fault coverage of functional test sequences by using limited-scan operations INTERNATIONAL TEST CONFERENCE 2001, PROCEEDINGS, 2001, : 211 - 220
- [37] Automatic Generation of Test Instructions for Path Delay Faults Based-On Stuck-at Fault in Processor Cores Using Assignment Decision Diagram 2014 5TH INTERNATIONAL CONFERENCE ON INTELLIGENT AND ADVANCED SYSTEMS (ICIAS 2014), 2014,
- [38] Net Diagnosis using Stuck-at and Transition Fault Models 2012 IEEE 30TH VLSI TEST SYMPOSIUM (VTS), 2012, : 221 - 226
- [40] Calculating the fault coverage for dual neighboring faults using single stuck-at fault patterns 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS, 2008, : 235 - 240