Comparison of compact on-chip inductors embedded in wafer-level package

被引：0

作者：

Itoi, K ^{[1
]}

Sato, M ^{[1
]}

Okada, K ^{[1
]}

Masu, K ^{[1
]}

Ito, T ^{[1
]}

机构：

[1] Fujikura Ltd, Micro Dev Dept, Elect Device Lab, Koto Ku, Tokyo 1358512, Japan

来源：

55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS | 2005年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

On-chip high-Q spiral inductors on Si substrate embedded in WLP have been fabricated. These inductors consisted of a thick Cu. electroplated rerouting to reduce electrical resistance and a thick resin layer to separate the inductors typically 20 mu m from Si substrate. The inductance L of 5.0 and 4.9 nH with the quality factor Q of 28.4 and 42.9 were obtained for a 3.5 turn rectangle spiral inductor at 2 GHz on the Si substrate, which had a resistivity of 4-6, 1 k Omega cm, respectively. The R-Si in the assignment parameters for lumped RLC equivalent circuit by ADS denoted more than 5 k Omega in a 3.5 turn. In,addition, the measured results of Q, L and f(res) corresponded well with the simulated values by HFSS and Sonnet. This technology realizes embedded high quality inductors in WLP.

引用

页码：1578 / 1583

页数：6

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