Investigation of NBTI recovery induced by conventional measurements for pMOSFETs with ultra-thin SiON gate dielectrics

被引:2
|
作者
Jin, Lei [1 ]
Xu, Mingzhen [1 ]
机构
[1] Peking Univ, Inst Microelect, Beijing 100871, Peoples R China
关键词
D O I
10.1109/IRWS.2007.4469218
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The NBTI recovery induced by conventional measurements and its physical origin are studied. It is demonstrated that, with carefully designed experiments using conventional slow equipments, the measurement induced recovery can be evaluated and investigated. It is re-affirmed that the measurement induced recovery is primarily due to the discharge of bulk traps in ultra-thin SiON. The passivation of interface traps plays a less important role, as compared with discharge of bulk traps.
引用
收藏
页码:38 / 42
页数:5
相关论文
共 50 条
  • [41] Advantage of the structure and the electrical properties of epitaxial ultra-thin zirconia gate dielectrics
    Kiguchi, Takanori
    Wakiya, Naoki
    Tanaka, Junzo
    Shinozaki, Kazuo
    MATERIALS SCIENCE AND ENGINEERING B-ADVANCED FUNCTIONAL SOLID-STATE MATERIALS, 2008, 148 (1-3): : 30 - 34
  • [42] Optical metrology for ultra-thin oxide and high-K gate dielectrics
    Chism, WW
    Diebold, AC
    Price, J
    CHARACTERIZATION AND METROLOGY FOR ULSI TECHNOLOGY, 2003, 683 : 124 - 128
  • [43] Voltage acceleration of time-dependent breakdown of ultra-thin gate dielectrics
    Pompl, T
    Röhner, M
    MICROELECTRONICS RELIABILITY, 2005, 45 (12) : 1835 - 1841
  • [44] Leakage current comparison between ultra-thin Ta2O5 films and conventional gate dielectrics
    Lu, Q
    Park, D
    Kalnitsky, A
    Chang, C
    Cheng, CC
    Tay, SP
    King, TJ
    Hu, CM
    IEEE ELECTRON DEVICE LETTERS, 1998, 19 (09) : 341 - 342
  • [45] Ultra-thin polymer gate dielectrics for top-gate polymer field-effect transistors
    Noh, Yong-Young
    Sirringhaus, Henning
    ORGANIC ELECTRONICS, 2009, 10 (01) : 174 - 180
  • [46] Ultra-thin gate oxides and ultra-shallow junctions for high performance, sub-100nm pMOSFETs
    Timp, G
    Agarwal, A
    Bourdelle, KK
    Bower, JE
    Boone, T
    Ghetti, A
    Green, M
    Garno, J
    Gossmann, H
    Jacobson, D
    Kleiman, R
    Kornblit, A
    Klemens, F
    Moccio, S
    O'Malley, ML
    Ocola, L
    Rosamilia, J
    Sapjeta, J
    Silverman, P
    Sorsch, T
    Timp, W
    Tennant, D
    INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, : 1041 - 1043
  • [47] OBSERVATION OF TWO GATE STRESS VOLTAGE DEPENDENCE OF NBTI INDUCED THRESHOLD VOLTAGE SHIFT OF ULTRA-THIN OXYNITRIDE GATE P-MOSFET
    Teo, Z. Q.
    Ang, D. S.
    Du, G. A.
    2009 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, VOLS 1 AND 2, 2009, : 1002 - 1004
  • [48] Enabling single-wafer process technologies for reliable ultra-thin gate dielectrics
    Miner, G
    Xing, GC
    Joo, HS
    Sanchez, E
    Yokota, Y
    Chen, CL
    Lopes, D
    Balakrishna, A
    ADVANCES IN RAPID THERMAL PROCESSING, 1999, 99 (10): : 3 - 14
  • [49] COMPARISON OF ULTRA-THIN GATE DIELECTRICS FOR 0.1 MU-M MOS DEVICES
    BENISTANT, F
    MONDON, F
    MARTIN, F
    GUEGAN, G
    MICROELECTRONIC ENGINEERING, 1995, 28 (1-4) : 105 - 108
  • [50] Improved method for the oxide thickness extraction in MOS structures with ultra-thin gate dielectrics
    Ghibaudo, G.
    Bruyere, S.
    Devoivre, T.
    DeSalvo, B.
    Vincent, E.
    IEEE International Conference on Microelectronic Test Structures, 1999, : 111 - 116