共 50 条
- [1] SAT-based unbounded symbolic model checking [J]. 40TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2003, 2003, : 840 - 843
- [2] Efficient SAT-based unbounded symbolic model checking using circuit cofactoring [J]. ICCAD-2004: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2004, : 510 - 517
- [3] SAT-based Unbounded Model Checking of Timed Automata [J]. FUNDAMENTA INFORMATICAE, 2008, 85 (1-4) : 425 - 440
- [4] SAT-based unbounded model checking of timed automata [J]. SEVENTH INTERNATIONAL CONFERENCE ON APPLICATION OF CONCURRENCY TO SYSTEM DESIGN, PROCEEDINGS, 2007, : 236 - 237
- [5] State set management for SAT-based unbounded model checking [J]. 2005 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2005, : 585 - 590
- [6] Integrating BDD-based and SAT-based symbolic model checking [J]. FRONTIERS OF COMBINING SYSTEMS, 2002, 2309 : 49 - 56
- [8] Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking [J]. Formal Methods in System Design, 2022, 60 : 117 - 146
- [9] Interpolation with Guided Refinement: revisiting incrementality in SAT-based Unbounded Model Checking [J]. 2014 FORMAL METHODS IN COMPUTER-AIDED DESIGN (FMCAD), 2014, : 43 - 50
- [10] Interpolation and SAT-based model checking [J]. COMPUTER AIDED VERIFICATION, 2003, 2725 : 1 - 13