共 50 条
- [31] A 10-bit 100-MS/s SAR ADC With Capacitor Swapping Technique in 90-nm CMOS [J]. 2017 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2017,
- [32] A 60-GHz 10-Gb/s OOK Modulator with Transformer-Feedback Technique for High Gain and On-Off Isolation in 90-nm CMOS [J]. 2018 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS (APMC), 2018, : 732 - 734
- [34] A 40-Gb/s Transmitter with 4:1 MUX and Subharmonically Injection-Locked CMU in 90-nm CMOS Technology [J]. 2009 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2009, : 48 - 49
- [36] A 40-Gb/s, digitally programmable peaking limiting amplifier with 20-dB differential gain in 90-nm CMOS [J]. 2006 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS, 2006, : 393 - +
- [37] Design of 20-Gb/s Four-Level Pulse Amplitude Modulation VCSEL Driver in 90-nm CMOS Technology [J]. 2016 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2016, : 195 - 198
- [39] RF signal generator using time domain harmonic suppression technique in 90 nm CMOS [J]. IEICE ELECTRONICS EXPRESS, 2012, 9 (04): : 270 - 275