Excursion Yield Loss and Cycle Time Reduction in Semiconductor Manufacturing

被引:27
|
作者
Leachman, Robert C. [1 ]
Ding, Shengwei [2 ]
机构
[1] Univ Calif Berkeley, Dept Ind Engn & Operat Res, Berkeley, CA 94720 USA
[2] DSD, Oakland, CA USA
关键词
Cost; cycle time; excursions; revenue; semiconductor manufacturing; yield;
D O I
10.1109/TASE.2010.2041450
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The importance of cycle time reduction is well known to the semiconductor manufacturing industry in the sense of reduced inventory costs and faster response to the market. Less emphasized is the fact that the overall die yield is also closely related to cycle time. In particular, some yield losses are due to "excursions," when process or equipment shift out of specifications. While some and perhaps most excursions are detected by in-line inspections, some are not detected until the wafers are tested in the probing area after fabrication. A long production cycle time will expose significant amounts of wafers in production to defective processing by such excursions. This paper introduces analytical formulas to quantify the revenue losses due to excursions not detected until end-of-line testing as a function of manufacturing cycle time, excursion probabilities and kill rates. The formulas provide a means to evaluate the revenue gains due to cycle time reduction, based on the assumption that the average selling prices of semiconductor products are declining steadily at predictable rates. Note to Practitioners-Formulas are provided to compute the expected total die losses over product lifetimes due to excursions in process and equipment that are not detected until end-of-line testing, given the process step, probability of occurrence and kill rate for each potential excursion, given the manufacturing cycle times, and given assumptions about baseline yield and yield learning rate. Formulas also are provided to compute the expected lifetime revenue losses from such excursions, given an assumed rate of price decline for die output. The impact of cycle time reduction on die output and revenue may be readily assessed using the formulas.
引用
收藏
页码:112 / 117
页数:6
相关论文
共 50 条
  • [21] Quantifying the benefits of cycle time reduction in semiconductor wafer fabrication
    Nemoto, K
    Akcali, E
    Uzsoy, RM
    [J]. IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2000, 23 (01): : 39 - 47
  • [22] Quantifying the benefits of cycle time reduction in semiconductor wafer fabrication
    Nemoto, K
    Akcali, E
    Uzsoy, R
    [J]. NINETEENTH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM - PROCEEDINGS, 1996 IEMT SYMPOSIUM, 1996, : 130 - 136
  • [23] Cycle time reduction at cluster tool in semiconductor wafer fabrication
    Swe, Aye Nyein
    Gupta, Amit Kumar
    Sivakumar, Appa Iyer
    Lendermann, Peter
    [J]. EPTC 2006: 8TH ELECTRONIC PACKAGING TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2006, : 671 - 677
  • [24] Case Study of Cycle Time Reduction by Mechanization in Manufacturing Environment
    Gnanavel, C.
    Saravanan, R.
    Chandrasekaran, M.
    Pugazhenthi, R.
    [J]. INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN ENGINEERING RESEARCH, 2017, 183
  • [25] Toward cycle time reduction in manufacturing SMEs: Proposal and evaluation
    Prashar, Anupama
    [J]. QUALITY ENGINEERING, 2018, 30 (03) : 469 - 484
  • [26] Microeconomics of yield learning in semiconductor manufacturing
    Monahan, KM
    [J]. COST AND PERFORMANCE IN INTEGRATED CIRCUIT CREATION, 2003, 5043 : 41 - 56
  • [27] THE EFFECTS OF CONTAMINATION ON SEMICONDUCTOR MANUFACTURING YIELD
    OSBURN, CM
    BERGER, H
    DONOVAN, RP
    JONES, GW
    [J]. JOURNAL OF ENVIRONMENTAL SCIENCES, 1988, 31 (02): : 45 - 57
  • [28] SHORT CYCLE MANUFACTURING AT MOTOROLA SEMICONDUCTOR
    BAXTER, E
    COFFMAN, S
    [J]. PROCEEDING OF THE TECHNICAL PROGRAM OF NEPCON WEST 89, VOLS 1 AND 2, 1989, : 1331 - 1335
  • [29] PRIORITY MIX PLANNING FOR CYCLE TIME-DIFFERENTIATED SEMICONDUCTOR MANUFACTURING SERVICES
    Chang, Shi-Chung
    Su, Shin-Shyu
    Chen, Ke-Ju
    [J]. 2008 WINTER SIMULATION CONFERENCE, VOLS 1-5, 2008, : 2251 - 2259
  • [30] A simulation based analysis of cycle time distribution, and throughput in semiconductor backend manufacturing
    Sivakumar, AI
    Chong, CS
    [J]. COMPUTERS IN INDUSTRY, 2001, 45 (01) : 59 - 78