A Forward Body Bias Generator for Digital CMOS Circuits with Supply Voltage Scaling

被引：0

作者：

Meijer, Maurice ^{[1
]}

de Gyvez, Jose Pineda ^{[1
]}

Kup, Ben ^{[1
]}

van Uden, Bert ^{[1
]}

Bastiaansen, Peter ^{[1
]}

Lammers, Marco ^{[1
]}

Vertregt, Maarten ^{[1
]}

机构：

[1] NXP Semicond, Eindhoven, Netherlands

来源：

2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS | 2010年

关键词：

POWER;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a new fully-integrated forward body bias (FBB) generator that holds its voltage constant relative to the (scalable) power supply of a digital IP. The generator is modular and can drive distinct digital IP block sizes in multiples of up to 1mm(2). The design has been implemented in 90nm low-power CMOS. Our basic unit for driving digital IP blocks up to 1mm(2) occupies a silicon area of 0.03mm(2) only. The generator completes a 500mV FBB voltage step within 4 mu s. The bandwidth of the design is 570kHz. The active current of the FBB generator alone is about 177 mu A for a nominal process, 1.2V supply and 85 degrees C. The standby current is as low as 72nA at 27 degrees C.

引用

页码：2482 / 2485

页数：4

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