An analog VLSI time-delay neural network implementation for phoneme recognition

被引：1
|
作者：
Gatt, E [1 ]
Micallef, J [1 ]
Chilton, E [1 ]
机构：
[1] Univ Malta, Dept Microelect, Msida, Malta
来源：
PROCEEDINGS OF THE 2000 6TH IEEE INTERNATIONAL WORKSHOP ON CELLULAR NEURAL NETWORKS AND THEIR APPLICATIONS (CNNA 2000) | 2000年
关键词：
D O I：
10.1109/CNNA.2000.876864
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
The paper proposes an analog VLSI neural network chip, which can be cascaded in order to develop a time-delay neural network system for phoneme recognition. Backpropagation learning has been adopted to train the network to recognise phoneme frames extracted from the TIMIT database. A prototype chip. implemented using CMOS 2.0 mum, double metal, double poly technology is also described together with its specifications.
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页码：315 / 320
页数：4
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