VLSI implementation of a neural network classifier

被引：0
|
作者：
Mandisodza, RLK [1 ]
Luke, DM [1 ]
Pochec, P [1 ]
机构：
[1] UNIV NEW BRUNSWICK,FAC COMP SCI,DEPT ELECT ENGN,FREDERICTON,NB E3B 5A3,CANADA
来源：
1996 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING - CONFERENCE PROCEEDINGS, VOLS I AND II: THEME - GLIMPSE INTO THE 21ST CENTURY | 1996年
关键词：
Hopfield classifier; EDA; verilog-HDL; FPGA; synthesis; pattern classification/recognition;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：178 / 181
页数：4
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