共 50 条
- [31] STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application 2021 IEEE INTERNATIONAL MEMORY WORKSHOP (IMW), 2021, : 80 - 83
- [33] R-MRAM: A ROM-Embedded STT MRAM Cache IEEE ELECTRON DEVICE LETTERS, 2013, 34 (10) : 1256 - 1258
- [35] STT-MRAM memories for loT applications: challenges and opportunities at circuit level and above 2017 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2017,
- [36] STT-MRAM memories for IoT applications: challenges and opportunities at circuit level and above 2017 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA), 2017,
- [37] Enabling a Reliable STT-MRAM Main Memory Simulation MEMSYS 2017: PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON MEMORY SYSTEMS, 2017, : 283 - 292
- [38] Embedded STT-MRAM Energy Analysis for Intermittent Applications using Mean Standby Duration 2021 28TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (IEEE ICECS 2021), 2021,
- [39] Evaluation of Spin-Hall-assisted STT-MRAM for Cache Replacement PROCEEDINGS OF THE 2016 IEEE/ACM INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURES (NANOARCH), 2016, : 73 - 78
- [40] EXPLORING POTENTIALS OF PERPENDICULAR MAGNETIC ANISOTROPY STT-MRAM FOR CACHE DESIGN 2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2014,