Modeling of electromagnetic effects from mask topography at full-chip scale

被引:26
|
作者
Adam, K [1 ]
机构
[1] Mentor Graph Corp, San Jose, CA 95131 USA
来源
关键词
domain decomposition method; optical proximity correction;
D O I
10.1117/12.600139
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
Polarization and other complex electromagnetic effects that arise because of mask topography are becoming increasingly more important to model. Commercial lithography simulation tools that operate on small layout areas of order 1-10 mu m(2) have advanced models requiring solution of Maxwell's three-dimensional boundary problem. However, this technique is not viable for full-chip modeling. Here, we show results that demonstrate the accuracy of domain decomposition method adapted for full-chip modeling of mask topography effects. The intensity error relative to the complete 3D solution is shown to be < 3%.
引用
收藏
页码:498 / 505
页数:8
相关论文
共 50 条
  • [21] Modeling of multi-level interconnects for full-chip simulation
    Yoon, S
    Won, T
    JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 2002, 40 (04) : 742 - 748
  • [22] Predictive focus exposure modeling (FEM) for full-chip lithography
    Chen, Luoqi
    Cao, Yu
    Liu, Hua-Yu
    Shao, Wenjin
    Feng, Mu
    Ye, Jun
    OPTICAL MICROLITHOGRAPHY XIX, PTS 1-3, 2006, 6154 : U1103 - U1111
  • [23] Approach to full-chip simulation and correction of stencil mask distortion for proximity electron lithography
    Sawamura, J
    Suzuki, K
    Omori, S
    Ashida, I
    Ohnuma, H
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2004, 22 (06): : 3092 - 3096
  • [24] Fast 3D thick mask model for full-chip EUVL simulations
    Liu, Peng
    Xie, Xiaobo
    Liu, Wei
    Gronlund, Keith
    EXTREME ULTRAVIOLET (EUV) LITHOGRAPHY IV, 2013, 8679
  • [25] Fast and accurate 3D mask model for full-chip OPC and verification
    Liu, Peng
    Cao, Yu
    Chen, Luoqi
    Chen, Guangqing
    Feng, Mu
    Jiang, Jiong
    Liu, Hua-Yu
    Suh, Sungsoo
    Lee, Sung-Woo
    Lee, Sukjoo
    OPTICAL MICROLITHOGRAPHY XX, PTS 1-3, 2007, 6520
  • [26] Toshiba, Ponte solutions team up on full-chip VCE modeling
    不详
    SOLID STATE TECHNOLOGY, 2008, 51 (06) : 16 - 20
  • [27] E-beam writing time improvement for Inverse Lithography Technology mask for full-chip
    Xiao, Guangming
    Son, Dong Hwan
    Cecil, Tom
    Irby, Dave
    Kim, David
    Baik, Ki-Ho
    Kim, Byung-Gook
    Jung, SungGon
    Suh, Sung Soo
    Cho, Hanku
    PHOTOMASK AND NEXT-GENERATION LITHOGRAPHY MASK TECHNOLOGY XVII, 2010, 7748
  • [28] Efficient Full-chip Mask 3D Model for Off-Axis Illumination
    Zhang, Hongbo
    Yan, Qiliang
    Zhang, Lin
    Croffie, Ebo
    Brooker, Peter
    Ren, Qian
    Fan, Yongfa
    PHOTOMASK TECHNOLOGY 2013, 2013, 8880
  • [29] Critical Pattern Selection Based on Diffraction Spectrum Analysis for Full-Chip Source Mask Optimization
    Liao Lufeng
    Li Sikun
    Wang Xiangzhao
    Zhang Libin
    Zhang Shuang
    Gao Pengzheng
    Wei Yayi
    Shi Weijie
    ACTA OPTICA SINICA, 2020, 40 (21)
  • [30] Sensitivity-based modeling and methodology for full-chip substrate noise analysis
    Murgai, R
    Reddy, SM
    Miyoshi, T
    Horie, T
    Tahoori, MB
    DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, : 610 - 615