共 50 条
- [1] High accuracy OPC electromagnetic full-chip modeling for curvilinear mask OPC and ILT DTCO AND COMPUTATIONAL PATTERNING III, 2024, 12954
- [4] Curvilinear mask solutions for full-chip EUV lithography NOVEL PATTERNING TECHNOLOGIES 2022, 2022, 12054
- [5] Full-chip simulation of LSI lithography mask using multi-scale analysis COMPUTATIONAL METHODS, PTS 1 AND 2, 2006, : 1641 - +
- [6] Fast full-chip MEEF simulations for mask and wafer metrology 22ND ANNUAL BACUS SYMPOSIUM ON PHOTOMASK TECHNOLOGY, PTS 1 AND 2, 2002, 4889 : 887 - 895
- [7] A layout dependent full-chip copper electroplating topography model ICCAD-2005: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2005, : 133 - 140
- [8] Efficient full-chip thermal modeling and analysis ICCAD-2004: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2004, : 319 - 326
- [9] Full-Chip Correction of Implant layer accounting for underlying topography OPTICAL MICROLITHOGRAPHY XXV, PTS 1AND 2, 2012, 8326
- [10] Accurate, full-chip, three-dimensional electromagnetic field model for non-Manhattan mask corners JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2016, 15 (02):