共 50 条
- [33] An FPGA Memory Hierarchy for High-level Synthesized OpenCL Kernels 2015 IEEE 17TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2015 IEEE 7TH INTERNATIONAL SYMPOSIUM ON CYBERSPACE SAFETY AND SECURITY, AND 2015 IEEE 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS), 2015, : 1719 - 1724
- [34] Allocation of FPGA DSP-Macros in Multi-Process High-Level Synthesis Systems 2014 19TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2014, : 616 - 621
- [35] Tessellation-Based Multi-Block Memory Mapping Scheme for High-Level Synthesis with FPGA 2016 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), 2016, : 125 - 132
- [37] System-Level FPGA Device Driver with High-Level Synthesis Support PROCEEDINGS OF THE 2013 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), 2013, : 128 - 135
- [40] FPGA acceleration analysis of LibSVM predictors based on high-level synthesis The Journal of Supercomputing, 2022, 78 : 14137 - 14163