The EH Model: Early Design Space Exploration of Intermittent Processor Architectures

被引:0
|
作者
Miguel, Joshua San [1 ]
Ganesan, Karthik [2 ]
Badr, Mario [2 ]
Xia, Chunqiu [2 ]
Li, Rose [2 ]
Hsiao, Hsuan [2 ]
Jerger, Natalie Enright [2 ]
机构
[1] Univ Wisconsin, Madison, WI 53706 USA
[2] Univ Toronto, Toronto, ON, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
NONVOLATILE; RETENTION; TIME;
D O I
10.1109/MICR0.2018.00055
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Energy-harvesting devices which operate solely on energy collected from their environment have brought forth a new paradigm of intermittent computing. These devices succumb to frequent power outages that would cause conventional systems to be stuck in a perpetual loop of restarting computation and never making progress. Ensuring forward progress in an intermittent execution model requires saving state in nonvolatile memory (backup) and potentially re-executing from the last saved state upon a power loss (restore). The interplay between spending energy on useful processing and spending energy on these necessary overheads yield unexpected trade-offs. To facilitate early design space exploration, the field of intermittent computing requires better models for 1) generalizing and reasoning about these trade-offs and 2) helping architects and programmers in making early-stage design decisions. We propose the EH model, which characterizes an intermittent system's ability to maximize how much of its available energy is spent on useful processor execution. The model parametrizes the energy costs associated with intermittent execution to allow an intuitive understanding of how forward progress can change. We use the Ell model to explore how forward progress is impacted with the frequency of backups and the energy cost of backups and restores. We validate the Ell model with hardware measurements on an MSP430 and characterize its parameters via simulation. We also demonstrate how architects and programmers can use the model to explore the design space of intermittent processors, derive insights, and model new optimizations that are unique to intermittent processor architectures.
引用
收藏
页码:600 / 612
页数:13
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