Charging and retention times in silicon-floating-dot-single-electron memory

被引：1
|
作者：
O'uchi, S
Tsubokura, T
Tajima, T
Amakawa, S
Fujishima, M
Hoh, K
机构：
[1] Univ Tokyo, Sch Engn, Bunkyo Ku, Tokyo 1138656, Japan
[2] Univ Tokyo, Sch Frontier Sci, Bunkyo Ku, Tokyo 1138656, Japan
来源：
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 2001年 / 40卷 / 3B期
关键词：
floating-dot MOS-type single-electron memory; direct tunneling; energy band structure; quantum confinement effect; time-dependent master equation;
D O I：
10.1143/JJAP.40.2041
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
The mechanism of electron storage was studied in a metal- oxide-silicon (MOS)-type single-electron memory which utilized the direct tunneling of electrons between a silicon floating dot and the conducting channel on the surface of silicon substrate. Time constants of charging and discharging were derived by a simple analysis of a single-electron box circuit, taking the structure of the energy band of silicon into consideration. It was shown that the features of the energy band were substantial for the memory function of the device and that a write time of the order of sub-microseconds was obtained; 10(10) times longer retention time was also obtained with compatibility in the same device at room temperature.
引用
收藏
页码：2041 / 2045
页数：5
相关论文
共 50 条
  • [21] Room temperature operation of Si single-electron memory with self-aligned floating dot gate
    Nakajima, A
    Futatsugi, T
    Kosemura, K
    Fukano, T
    Yokoyama, N
    IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, : 952 - 954
  • [22] Room temperature operation of Si single-electron memory with self-aligned floating dot gate
    Nakajima, A
    Futatsugi, T
    Kosemura, K
    Fukano, T
    Yokoyama, N
    APPLIED PHYSICS LETTERS, 1997, 70 (13) : 1742 - 1744
  • [23] Concept of floating-dot memory transistors on silicon-on-insulator substrate
    Winkler, O
    Merget, F
    Heuser, M
    Hadam, B
    Baus, M
    Spangenberg, B
    Kurz, H
    MICROELECTRONIC ENGINEERING, 2002, 61-2 : 497 - 503
  • [24] NEW FLOATING-GATE ALGAAS/GAAS MEMORY DEVICES WITH GRADED-GAP ELECTRON INJECTOR AND LONG RETENTION TIMES
    CAPASSO, F
    BELTRAM, F
    MALIK, RJ
    WALKER, JF
    IEEE ELECTRON DEVICE LETTERS, 1988, 9 (08) : 377 - 379
  • [25] Simulation of a triple-gate single electron FET memory with a quantum dot floating gate and a quantum wire channel
    Liu Kui
    Ding Hong-Lin
    Zhang Xian-Gao
    Yu Lin-Wei
    Huang Xin-Fan
    Chen Kun-Ji
    ACTA PHYSICA SINICA, 2008, 57 (11) : 7052 - 7056
  • [26] Simulation of a triple-gate single electron FET memory with a quantum dot floating gate and a quantum wire channel
    National Laboratory of Solid State Microstructures, Nanjing University, Nanjing 210093, China
    Wuli Xuebao, 2008, 11 (7052-7056):
  • [27] Process Optimization and Downscaling of a Single-Electron Single Dot Memory
    Krzeminski, Christophe
    Tang, Xiaohui
    Reckinger, Nicolas
    Bayot, Vincent
    Dubois, Emmanuel
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2009, 8 (06) : 737 - 748
  • [28] Single-electron charging in doped silicon double dots
    Single, C
    Augke, R
    Prins, FE
    Wharam, DA
    Kern, DP
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 1999, 14 (12) : 1165 - 1168
  • [29] Silicon single-electron memory structure
    Stone, NJ
    Ahmed, H
    MICROELECTRONIC ENGINEERING, 1998, 42 : 511 - 514
  • [30] Silicon single-electron memory structure
    Stone, N.J.
    Ahmed, H.
    Microelectronic Engineering, 1998, 41-42 : 511 - 514
12345