Simulation of a triple-gate single electron FET memory with a quantum dot floating gate and a quantum wire channel

This paper investigates a triple-gate single electron FET memory with a Si quantum dot floating gate and a Si quantum wire channel by establishing a numerical model of two-dimensional Schrodinger and Poisson equations. The electron concentration in the silicon quantum wire channel of different scales is investigated under conditions that diverse gate voltage and programming voltage are applied with a two-dimensional finite element solution. The influence of the quantum confinement effect and the electron distribution in the nano-scale channel on the structure is also investigated. Results of the simulation show that, the threshold voltage increases when the size of the channel decreases, and the voltage also increases as the number of electrons on the floating gate increases. However, a non-linear saturation tendency occurs when the number of injected electrons increases further, due to the high density of carriers in the nanoscale Si nanowire channel. Further research shows that the strong quantum confinement effect in the channel can effectively restrain the saturation tendency when the size of the channel is small enough. It's worth mentioning that the threshold voltage shift reflects the number of electrons stored on the floating gate. This effect implies a possibility of multi-level storage.