Packaged 30 Gbit/s data demultiplexing and clock extraction IC fabricated in a AlGaAs/GaAs HBT technology

The authors have fabricated a research prototype 30 Gbit/s data demultiplexing and clock extraction IC for high speed multigigabit per second optical communication Systems. The circuit features a two stage on chip front end limiting amplifier, as well as a master-slave decision circuit, differentiate and rectify circuitry for clock recovery, and a two stage limiting amplifier on the clock input to the decision circuit. The IC was packaged in a hybrid circuit module, and was used in lightwave system experiments that included full PLL timing recovery.