共 50 条
- [43] A Hardware-Efficient Deblocking Filter Design for HEVC [J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 1786 - 1789
- [44] Computing with Biophysical and Hardware-Efficient Neural Models [J]. ADVANCES IN COMPUTATIONAL INTELLIGENCE, IWANN 2017, PT I, 2017, 10305 : 535 - 547
- [45] A Hardware-Efficient Logarithmic Multiplier with Improved Accuracy [J]. 2019 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2019, : 928 - 931
- [46] A Novel Visual Cryptography Scheme [J]. INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER CONTROL : ICACC 2009 - PROCEEDINGS, 2009, : 207 - 211
- [47] On the randomness of visual cryptography scheme [J]. 2013 NINTH INTERNATIONAL CONFERENCE ON INTELLIGENT INFORMATION HIDING AND MULTIMEDIA SIGNAL PROCESSING (IIH-MSP 2013), 2013, : 391 - 394
- [49] Nested visual cryptography scheme [J]. CHINESE JOURNAL OF ELECTRONICS, 2008, 17 (03) : 459 - 463
- [50] A Verifiable Visual Cryptography Scheme [J]. 2008 INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND SECURITY, VOLS 1 AND 2, PROCEEDINGS, 2008, : 908 - 911