Online Fault Detection in Reversible Logic

被引：9
|
作者：
Nayeem, N. M. [1 ]
Rice, J. E. [1 ]
机构：
[1] Univ Lethbridge, Dept Math & Comp Sci, Lethbridge, AB T1K 3M4, Canada
来源：
2011 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT) | 2011年
关键词：
reversible logic; online testability; Toffoli gates;
D O I：
10.1109/DFT.2011.55
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
A new approach for online fault detection in Boolean reversible circuits is described. Previous work had described this approach for circuits generated by the basic ESOP-based logic synthesis, and in this work we extend the approach for any type of Toffoli networks. An online testable circuit is created by modifying an existing cascade of Toffoli gates in a simple process that involves changing the existing Toffoli gates as well as the addition of one line and 2 p gates, where p is the number of lines in the original circuit.
引用
收藏
页码：426 / 434
页数：9
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