共 50 条
- [1] Online Fault Detection in Reversible Logic [J]. 2011 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), 2011, : 426 - 434
- [2] Online Multiple Fault Detection in Reversible Circuits [J]. 2010 IEEE 25TH INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS (DFT 2010), 2010, : 429 - 437
- [3] Fault Detection for Single and Multiple Missing-gate Faults in Reversible circuits [J]. 2008 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION, VOLS 1-8, 2008, : 131 - 135
- [6] Online Missing/Repeated Gate Faults Detection in Reversible Circuits [J]. 2011 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), 2011, : 435 - 442
- [7] Synthesis of Fault Tolerant Reversible Logic Circuits [J]. IEEE CIRCUITS AND SYSTEMS INTERNATIONAL CONFERENCE ON TESTING AND DIAGNOSIS, 2009, : 447 - +
- [8] Analyzing fault models for reversible logic circuits [J]. 2006 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION, VOLS 1-6, 2006, : 2407 - 2412
- [9] Lowering the Quantum Gate Cost of Reversible Circuits [J]. 53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 260 - 263
- [10] A Timing Fault Model and an Efficient Timing Fault Simulation Method for Rapid Single-Flux-Quantum Logic Circuits [J]. 33RD INTERNATIONAL SYMPOSIUM ON SUPERCONDUCTIVITY (ISS2020), 2021, 1975