A reliability study in P-channel punchthrough for ASIC CMOS input/output buffer leakage

被引：0
|
作者：
Spory, Erick M. [1 ]
机构：
[1] Atmel Corp, Dept Failure Anal, Colorado Springs, CO 80906 USA
来源：
2007 IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP FINAL REPORT | 2007年
关键词：
D O I：
10.1109/IRWS.2007.4469241
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Quite simply, does CMOS punchthrough leakage current present a reliability risk? Does this form of leakage accelerate any other failure mechanisms or alter device performance within the circuit? This paper empirically answers these questions while providing an academic understanding of the mechanism and why it dose not pose a reliability risk.
引用
收藏
页码：139 / 142
页数：4
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