Reliability tests for system-on-chip design

被引：0
|
作者：
Firtat, B [1 ]
Enoiu, C [1 ]
Delovsky, G [1 ]
机构：
[1] Natl Inst Res & Dev Microtechnol, Bucharest, Romania
来源：
2004 International Semiconductor Conference, Vols 1and 2, Proceedings | 2004年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
System-on-Chip (SoC) has created a new, set of design challenges. The higher integration capacity of SoC reduces the number of components in the system and trims the size and routing complexity of the printed circuit board. Reliability tests for such systems were described.
引用
收藏
页码：471 / 474
页数：4
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