A Hybrid Architecture for Efficient FPGA-based Implementation of Multilayer Neural Network

被引:0
|
作者
Lin, Zhen [1 ]
Dong, Yiping [1 ]
Li, Yan [1 ]
Watanabe, Takahiro [1 ]
机构
[1] Waseda Univ, Grad Sch Informat Prod & Syst, Kitakyushu, Fukuoka, Japan
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a novel architecture for the FPGA-based implementation of multilayer neural network (NN), which integrates the layer-multiplexing and pipeline architecture together. The proposed method is aimed at enhancing the efficiency of resource usage and improving the forward speed at the module level, so that a larger NN can be implemented on commercial FPGAs. We developed a mapping method from NN schematic to physical architecture in FPGA by using the hybrid architecture, and also developed an algorithm to automatically determine the architecture by optimizing the application specific neural network topology. The experimental results with several different network topologies show that the proposed architecture can produce a very compact circuit with higher speed, compared with conventional methods.
引用
收藏
页码:616 / 619
页数:4
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