A Hybrid Architecture for Efficient FPGA-based Implementation of Multilayer Neural Network

被引:0
|
作者
Lin, Zhen [1 ]
Dong, Yiping [1 ]
Li, Yan [1 ]
Watanabe, Takahiro [1 ]
机构
[1] Waseda Univ, Grad Sch Informat Prod & Syst, Kitakyushu, Fukuoka, Japan
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a novel architecture for the FPGA-based implementation of multilayer neural network (NN), which integrates the layer-multiplexing and pipeline architecture together. The proposed method is aimed at enhancing the efficiency of resource usage and improving the forward speed at the module level, so that a larger NN can be implemented on commercial FPGAs. We developed a mapping method from NN schematic to physical architecture in FPGA by using the hybrid architecture, and also developed an algorithm to automatically determine the architecture by optimizing the application specific neural network topology. The experimental results with several different network topologies show that the proposed architecture can produce a very compact circuit with higher speed, compared with conventional methods.
引用
收藏
页码:616 / 619
页数:4
相关论文
共 50 条
  • [21] An FPGA-Based Performance Evaluation of Artificial Neural Network Architecture Algorithm for IoT
    Arthur A. M. Teodoro
    Otávio S. M. Gomes
    Muhammad Saadi
    Bruno A. Silva
    Renata L. Rosa
    Demóstenes Z. Rodríguez
    Wireless Personal Communications, 2022, 127 : 1085 - 1116
  • [22] An FPGA-Based Performance Evaluation of Artificial Neural Network Architecture Algorithm for IoT
    Teodoro, Arthur A. M.
    Gomes, Otavio S. M.
    Saadi, Muhammad
    Silva, Bruno A.
    Rosa, Renata L.
    Rodriguez, Demostenes Z.
    WIRELESS PERSONAL COMMUNICATIONS, 2022, 127 (02) : 1085 - 1116
  • [23] A Review of FPGA-Based Custom Computing Architecture for Convolutional Neural Network Inference
    PENG Xiyuan
    YU Jinxiang
    YAO Bowen
    LIU Liansheng
    PENG Yu
    Chinese Journal of Electronics, 2021, 30 (01) : 1 - 17
  • [24] A Review of FPGA-Based Custom Computing Architecture for Convolutional Neural Network Inference
    Peng Xiyuan
    Yu Jinxiang
    Yao Bowen
    Liu Liansheng
    Peng Yu
    CHINESE JOURNAL OF ELECTRONICS, 2021, 30 (01) : 1 - 17
  • [25] An Efficient Digital Architecture for Principal Component Neural Network and its FPGA Implementation
    Sudha, N.
    Prasanna, Ch Siva Sai
    Kamakoti, V.
    IETE JOURNAL OF RESEARCH, 2007, 53 (05) : 425 - 431
  • [26] FPGA-Based Implementation of an Artificial Neural Network for Measurement Acceleration in BOTDA Sensors
    Abbasnezhad, Mojtaba
    Alizadeh, Bijan
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2019, 68 (11) : 4326 - 4334
  • [27] Implementation of Data-optimized FPGA-based Accelerator for Convolutional Neural Network
    Cho, Mannhee
    Kim, Youngmin
    2020 INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION, AND COMMUNICATION (ICEIC), 2020,
  • [28] FPGA-based Implementation of Hand Gesture Recognition Using Convolutional Neural Network
    Zhang, Tongtong
    Zhou, Weiguo
    Jiang, Xin
    Liu, Yunhui
    2018 IEEE INTERNATIONAL CONFERENCE ON CYBORG AND BIONIC SYSTEMS (CBS), 2018, : 133 - 138
  • [29] FPGA-Based Architecture for Implementation of Discrete Sine Transform
    Jain, Anamika
    Pandey, Neeta
    Jain, Priyanka
    ADVANCES IN SYSTEM OPTIMIZATION AND CONTROL, 2019, 509 : 13 - 22
  • [30] FPGA-based Acceleration of Neural Network Training
    Sang, Ruoyu
    Liu, Qiang
    Zhang, Qijun
    2016 IEEE MTT-S INTERNATIONAL CONFERENCE ON NUMERICAL ELECTROMAGNETIC AND MULTIPHYSICS MODELING AND OPTIMIZATION (NEMO), 2016,