Architecture-level performance estimation method based on system-level profiling

被引：5
|
作者：
Ueda, K [1 ]
Sakanushi, K [1 ]
Takeuchi, Y [1 ]
Imai, M [1 ]
机构：
[1] Osaka Univ, Grad Sch Informat Sci & Technol, Suita, Osaka 5650871, Japan
来源：
IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES | 2005年 / 152卷 / 01期
关键词：
D O I：
10.1049/ip-cdt:20045057
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
An architecture-level performance estimation method based on system-level profiling is proposed. The proposed method estimates the performance of the target architecture by the following procedures: system-level profiling; automatic construction of the execution order graph and execution dependency graph from the profiling information; and estimation of the system performance based on the graph analysis. The proposed method enables fast performance estimation because it can estimate the performance of various architectures from the same system-level profiling information. Experimental results show that the proposed estimation method is 2700 times faster than the architecture-level simulation.
引用
收藏
页码：12 / 19
页数：8
相关论文
共 50 条
  • [1] Architecture-level performance estimation for IP-based embedded systems
    Ueda, K
    Sakanushi, K
    Takeuchi, Y
    Imai, M
    [J]. DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, : 1002 - 1007
  • [2] System-level Performance Estimation of SCMA
    Sun, Ce
    Li, Lei
    Chen, Jianqiang
    Jia, Dai
    Yu, Hanxiao
    Huang, Jingxuan
    Fei, Zesong
    [J]. 2016 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS (ICCS), 2016,
  • [3] Architecture-level power estimation and design experiments
    Chen, RY
    Irwin, MJ
    [J]. ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2001, 6 (01) : 50 - 66
  • [4] Software Energy Consumption Estimation at Architecture-level
    Li, Deguang
    Guo, Bing
    Li, Junke
    Wang, Jihe
    Huang, Yanhui
    Li, Qiang
    Shen, Yan
    [J]. 2016 13TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS) - PROCEEDINGS, 2016, : 7 - 11
  • [5] MoDe: A method for system-level architecture evaluation
    Romberg, J
    Slotosch, O
    Hahn, G
    [J]. FIRST ACM AND IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR CO-DESIGN, PROCEEDINGS, 2003, : 13 - 23
  • [6] Architecture-Level Energy Estimation for Heterogeneous Computing Systems
    Wang, Francis
    Wu, Yannan Nellie
    Woicik, Matthew
    Emer, Joel S.
    Sze, Vivienne
    [J]. 2021 IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE (ISPASS 2021), 2021, : 229 - 231
  • [7] Profiling and Online System-Level Performance and Power Estimation for Dynamically Adaptable Embedded Systems
    Mu, Jingqing
    Shankar, Karthik
    Lysecky, Roman
    [J]. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2013, 12 (03)
  • [8] A practical method for system-level bus architecture validation
    Takemura, K
    Mizuno, M
    Motohara, A
    [J]. IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2000, E83A (12) : 2439 - 2445
  • [9] System-level performance estimation of a pulse detonation based hybrid engine
    Goldmeer, Jeffrey
    Tangirala, Venkat
    Dean, Anthony
    [J]. JOURNAL OF ENGINEERING FOR GAS TURBINES AND POWER-TRANSACTIONS OF THE ASME, 2008, 130 (01):
  • [10] Architecture-level software performance abstractions for online, performance prediction
    Brosig, Fabian
    Huber, Nikolaus
    Kounev, Samuel
    [J]. SCIENCE OF COMPUTER PROGRAMMING, 2014, 90 : 71 - 92
12345