A hardware operating system kernel for multi-processor systems

被引:5
|
作者
Park, Sanggyu [1 ]
Hong, Do-Sun [1 ]
Chae, Soo-Ik [1 ]
机构
[1] Seoul Natl Univ, Sch EECS, Seoul 151742, South Korea
关键词
multiprocessor; RISC; operating system; multithreading;
D O I
10.1587/elex.5.296
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We propose a hardware operating system kernel (HOSK), which schedules tasks, controls semaphores, and pre-fetches contexts, as a hardware coprocessor in multiprocessor systems. A multiprocessor system can substantially reduce multithreading overheads by using the HOSK together with simplified RISC processors that do not include hardware for multithreading. We implemented an efficient HOSK which requires about 14 similar to 25K gates. The experimental results show that the multithreading overheads with a HOSK can be reduced to less than 1 percent. Preliminary efforts confirm that this approach is a feasible solution for minimizing the hardware complexity of a multiprocessor system.
引用
收藏
页码:296 / 302
页数:7
相关论文
共 50 条
  • [21] A New Hardware Logic Circuit for Evaluating Multi-Processor Chip Security
    Lian, Mengyun
    Wang, Jian
    Lu, Jinzhi
    2018 EIGHTH INTERNATIONAL CONFERENCE ON INSTRUMENTATION AND MEASUREMENT, COMPUTER, COMMUNICATION AND CONTROL (IMCCC 2018), 2018, : 1571 - 1574
  • [22] Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design
    Ando, Yuki
    Shibata, Seiya
    Honda, Shinya
    Tomiyama, Hiroyuki
    Takada, Hiroaki
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2010, E93A (12) : 2509 - 2516
  • [23] MEASURES FOR THE QUALITY OF A MULTI-PROCESSOR SYSTEM.
    Hoja, H.
    Zeisel, G.
    Elektronische Rechenanlagen, 1974, 16 (03): : 104 - 108
  • [24] New multi-processor digital excitation system
    Morse, CA
    Mummert, CR
    Martinez, RF
    Gibbs, IA
    Prather, EC
    2000 IEEE POWER ENGINEERING SOCIETY SUMMER MEETING, CONFERENCE PROCEEDINGS, VOLS 1-4, 2000, : 643 - 648
  • [25] A multi-processor system for video coding applications
    Iyer, DS
    Chong, MN
    Cai, WT
    ISCE '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, 1997, : 210 - 213
  • [26] ENSEMBLE: A communication layer for embedded multi-processor systems
    Cadot, S
    Kuijlman, F
    Langendoen, K
    van Reeuwijk, K
    Sips, H
    ACM SIGPLAN NOTICES, 2001, 36 (08) : 56 - 63
  • [27] ORGANIZATION OF MULTI-PROCESSOR SYSTEMS FOR IMAGE-PROCESSING
    CANTONI, V
    LECTURE NOTES IN PHYSICS, 1984, 196 : 145 - 157
  • [28] Arbiter synthesis approach for SoC multi-processor systems
    Zitouni, Abdelkrim
    Tourki, Rached
    COMPUTERS & ELECTRICAL ENGINEERING, 2008, 34 (01) : 63 - 77
  • [29] Nonlinear finite element implementation on multi-processor systems
    Owen, D.R.J.
    Alves, J.S.R.
    Mitchell, F.
    Mitchell, G.P.
    Proceedings of the European Conference on Structural Dynamics, 1991,
  • [30] DIAGNOSTIC AND RECOVERY FUNCTIONS IN A MULTI-PROCESSOR SYSTEM.
    Bouvier, F.
    Huon, S.
    Spagnol
    IBM technical disclosure bulletin, 1985, 27 (09): : 5036 - 5037