Nanoscale epitaxial cobalt salicide bitlines for charge trapping memory cells

被引:1
|
作者
Kleint, C. A. [1 ]
Mueller, T. [1 ]
Teichert, S. [1 ]
Fitz, C. [1 ]
Nagel, N. [1 ]
Kuesters, K. H. [1 ]
机构
[1] Qimonda Dresden GmbH & Co, OHG, D-01099 Dresden, Germany
关键词
D O I
10.1063/1.2906366
中图分类号
O59 [应用物理学];
学科分类号
摘要
An epitaxial CoSi2 process is presented, which allows the self-aligned formation of bitlines with only a few tens of nanometer width for Twin Flash memory cells in the 63 nm generation. The bitlines show a good thermal stability and low resistance for widths down to 35 nm, where polycrystalline CoSi2 is known to exhibit a strong narrow linewidth effect. Transmission electron microscopy studies revealed a cube-on-cube epitaxy with only a few twins depending on the annealing conditions. The low bitline resistance results in a linear drain voltage dependence of the programing characteristics and a suppression of secondary electron injection during programing. (C) 2008 American Institute of Physics.
引用
收藏
页数:3
相关论文
共 50 条
  • [41] REDUCED OXIDE CHARGE TRAPPING AND IMPROVED HOT-ELECTRON RELIABILITY IN SUBMICROMETER MOS DEVICES FABRICATED BY TITANIUM SALICIDE PROCESS
    CHANG, ST
    CHIU, KY
    IEEE ELECTRON DEVICE LETTERS, 1988, 9 (05) : 244 - 246
  • [42] Ti-Al-O nanocrystal charge trapping memory cells fabricated by atomic layer deposition
    Cao, Zheng-Yi
    Li, Ai-Dong
    Li, Xin
    Cao, Yan-Qiang
    Wu, Di
    THIN SOLID FILMS, 2014, 563 : 6 - 9
  • [43] Reading Operation and Cell Scalability of Nonvolatile Schottky barrier Multibit Charge-Trapping Memory Cells
    Shih, Chun-Hsing
    Liang, Ji-Ting
    Luo, Yan-Xiang
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (06) : 1599 - 1606
  • [44] Experimental Study of Charge Trapping Type FinFET Flash Memory
    Liu, Yongxun
    Nabatame, Toshihide
    Matsukawa, Takashi
    Endo, Kazuhiko
    O'uchi, Sinichi
    Tsukada, Junichi
    Yamauchi, Hiromi
    Ishikawa, Yuki
    Mizubayashi, Wataru
    Morita, Yukinori
    Migita, Shinji
    Ota, Hiroyuki
    Chikyow, Toyohiro
    Masahara, Meishoku
    2014 IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC), 2014,
  • [45] Carriers recombination processes in charge trapping memory cell by simulation
    宋云成
    刘晓彦
    杜刚
    康晋锋
    韩汝琦
    Chinese Physics B, 2008, 17 (07) : 2678 - 2682
  • [46] The influence of thermally assisted tunneling on the performance of charge trapping memory
    彭雅华
    刘晓彦
    杜刚
    刘飞
    金锐
    康晋锋
    ChinesePhysicsB, 2012, 21 (07) : 591 - 595
  • [47] Charge Trapping Type SOI-FinFET Flash Memory
    Liu, Y. X.
    Nabatame, T.
    Matsukawa, T.
    Endo, K.
    O'uchi, S.
    Tsukada, J.
    Yamauchi, H.
    Ishikawa, Y.
    Mizubayashi, W.
    Morita, Y.
    Migita, S.
    Ota, H.
    Chikyow, T.
    Masahara, M.
    DIELECTRICS FOR NANOSYSTEMS 6: MATERIALS SCIENCE, PROCESSING, RELIABILITY, AND MANUFACTURING, 2014, 61 (02): : 263 - 280
  • [48] The influence of thermally assisted tunneling on the performance of charge trapping memory
    Peng, Ya-Hua
    Liu, Xiao-Yan
    Du, Gang
    Liu, Fei
    Jin, Rui
    Kang, Jin-Feng
    CHINESE PHYSICS B, 2012, 21 (07)
  • [49] Memory effect from charge trapping in layered organic structures
    Kang, SH
    Crisp, T
    Kymissis, I
    Bulovic, V
    APPLIED PHYSICS LETTERS, 2004, 85 (20) : 4666 - 4668
  • [50] Carriers recombination processes in charge trapping memory cell by simulation
    Song Yun-Cheng
    Liu Xiao-Yan
    Du Gang
    Kang Jin-Feng
    Han Ru-Qi
    CHINESE PHYSICS B, 2008, 17 (07) : 2678 - 2682