Tunable piezoresistance and noise in gate-all-around nanowire field-effect-transistor

被引：15

作者：

Singh, Pushpapraj ^{[1
,2
]}

Park, Woo-Tae ^{[2
]}

Miao, Jianmin ^{[1
,2
]}

Shao, Lichun ^{[2
]}

Kotlanka, Rama Krishna ^{[2
]}

Kwong, Dim-Lee ^{[2
]}

机构：

[1] Nanyang Technol Univ, Sch Mech & Aerosp Engn, Singapore 639798, Singapore

[2] ASTAR, Inst Microelect, Singapore 117685, Singapore

来源：

APPLIED PHYSICS LETTERS | 2012年 / 100卷 / 06期

关键词：

field effect transistors; nanowires; piezoresistance; semiconductor device noise; GIANT PIEZORESISTANCE; SILICON NANOWIRES; LAYERS; CMOS;

D O I：

10.1063/1.3683516

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

The piezoresistance and noise of n-type gate-all-around nanowire field-effect-transistor (NWFET) is investigated as a function of gate bias. With narrow gate bias span of 0.6 V near threshold region, the piezoresistive coefficient of NWFET enhances up to seven times from 29 x 10(-11) Pa-1 to 207 x 10(-11) Pa-1 under compressive and tensile strain conditions. Results reveal that the low frequency noise is reduced when operated in subthreshold region. The higher piezoresistive coefficient and reduced noise improve the sensor resolution (minimum detectable strain) by sixteen times. NWFET operates at low bias with higher piezoresistance and signal-to-noise ratio and offers promising applications in strain sensors. (C) 2012 American Institute of Physics. [doi:10.1063/1.3683516]

引用

页数：4

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