Production Test Considerations for Mixed-signal IC with Background Calibration

被引：2

作者：

Yagi, Takuya ^{[1
]}

Kobayashia, Haruo ^{[1
]}

Tan, Yohei ^{[1
]}

Ito, Satoshi ^{[1
]}

Uemori, Satoshi ^{[1
]}

Takai, Nobukazu ^{[1
]}

Yamaguchi, Takahiro J. ^{[1
]}

机构：

[1] Gunma Univ, Grad Sch Engn, Dept Elect Engn, Kiryu, Gunma 3768515, Japan

来源：

IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING | 2010年 / 5卷 / 06期

关键词：

mixed-signal IC Test; BIST; ATE; background calibration; digitally assisted analog technology;

D O I：

10.1002/tee.20584

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes an improved method of background calibration that reduces the production testing lime of mixed-signal ICs. Production testing nine typically consists of 'calibration convergence time' and 'functional testing time' following calibration convergence The method of reducing calibration convergence time that is proposed here does not require an extra ADC operation for functional testing after calibration convergence, and can be implemented with a little additional on-chip test-support circuitry when testing is performed by an automatic test equipment (ATE) We discuss the application of this method to background calibration of pipelined ADCs, and present simulation results that demonstrate its effectiveness in reducing testing time (C) 2010 Institute of Electrical Engineers of Japan Published by John Wiley & Sons. Inc

引用

页码：627 / 631

页数：5

共 50 条

[31] Current-balanced logic for mixed-signal IC's
Albuquerque, EFM
Silva, MM
ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 274 - 277
[32] Mixed-signal test automation: are we there yet?
Leger, Gildas
Barragan, Manuel J.
2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
[33] Mixed-signal consortium completes test vehicles
Electronic Design, 1995, 43 (06)
[34] CMOS NOW DOMINATES ANALOG, MIXED-SIGNAL IC DESIGNS
GOODENOUGH, F
ELECTRONIC DESIGN, 1992, 40 (09) : 56 - &
[35] PLACE-AND-ROUTE IN MIXED-SIGNAL ASIC AND IC DESIGNS
ARNOUT, G
COMPUTER DESIGN, 1992, 31 (10): : 114 - 114
[36] IC mixed-signal BIST: Separating facts from fiction
Sunter, SK
INTERNATIONAL TEST CONFERENCE 2002, PROCEEDINGS, 2002, : 1205 - 1205
[37] Getting to a test standard for mixed-signal boards
Osseiran, A
38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, : 1157 - 1161
[38] Convergent SOCs challenge mixed-signal test
Vana, T
Blair, D
EE-EVALUATION ENGINEERING, 2003, 42 (01): : 24 - +
[39] Design, fabrication and use of mixed-signal IC testability structures
Parker, KP
McDermid, JE
Browen, RA
Nuriya, K
Hirayama, K
Matsuzawa, A
ITC - INTERNATIONAL TEST CONFERENCE 1997, PROCEEDINGS: INTEGRATING MILITARY AND COMMERCIAL COMMUNICATIONS FOR THE NEXT CENTURY, 1997, : 489 - 498
[40] Measuring mixed-signal test stimulus quality
Sunter, Stephen
Jurga, Krzysztof
2018 23RD IEEE EUROPEAN TEST SYMPOSIUM (ETS), 2018,

← 1 2 3 4 5 →