OPC optimization for double dipole lithography and its application on 45nm node with dry exposure

被引:0
|
作者
Park, Se-Jin [1 ]
Seo, Jae-Kyung [1 ]
Li, ChengHe [1 ]
Liu, Daisy [1 ]
An, Petros [1 ]
Kang, Xiao-Hui [2 ]
Guo, Eric [1 ]
机构
[1] Semicond Mfg Int Corp, Shanghai, Peoples R China
[2] Menton Graph, Shanghai, Peoples R China
来源
关键词
double dipole lithography; DDL; double pattern; mask decomposition; sub-design rule assist feature; SRAF; overlay; design for manufacturing;
D O I
10.1117/12.773290
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Various resolution enhancement techniques have been proposed in order to enable optical lithography at low k1 imaging, e.g. alt-PSM (phase shift mask), chromeless phase lithography (CPL), double exposure technique (DET) and double dipole lithography (DDL). In spite of its low throughput in production, DDL technique is a very attractive solution for low k1 process because of the relatively low cost of binary or attenuated phase shift masks, which can be combined with strong dipole illuminations and flexible SRAF rule to enhance the process window. Another attraction of DDL is that dry scanner still can be used for 45nm node instead of expensive immersion lithography process. In this paper, two aspects for DDL application have been focused on. The first one is OPC optimization method for DDL, which includes SRAF optimization, mask decomposition and pixel-based OPC. The whole flow is optimized specifically for DDL to achieve satisfactory pattern results on wafer. The second is the overlay issue. Since two DDL masks are exposed in turn, the overlay variation between two masks becomes dominant factor deteriorating pattern quality. The effect of overlay tolerance is also studied through process window simulation. DDL has been demonstrated to be capable of 45nm node logic with dry scanner. The pattern fidelity and process window of 45nm node SRAM & Random Logic are evaluated for active/gate layer and dark field metal layer.
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页数:8
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