Electrical modeling and simulation challenges in chip-package codesign

被引：11
|
作者：
Cangellaris, AC [1 ]
机构：
[1] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61801 USA
来源：
IEEE MICRO | 1998年 / 18卷 / 04期
关键词：
D O I：
10.1109/40.710871
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
High-performance, multifunctional systems demand novel, often revolutionary, practices in functional-block integration and packaging. Independent chip, package, and board design will have to give way to a holistic approach.
引用
收藏
页码：50 / 59
页数：10
相关论文
共 50 条
  • [1] Chip-package codesign efforts continue
    Semiconductor International, 2006, 29 (09)
  • [2] CAD flows for chip-package Codesign
    Varma, A
    Glaser, A
    Franzon, P
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2003, : 11 - 14
  • [3] Chip-Package Codesign with Redistribution Layer
    Suryakumar, Mahadevan
    Mekonnen, Yidnek
    Sarangi, Ananda
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, 2009, : 231 - 234
  • [4] New route in system integration: Chip-package codesign
    Troster, G
    IEEE MICRO, 1998, 18 (04) : 7 - 9
  • [5] Optimal chip-package codesign for high-performance DSP
    Mehrotra, P
    Rao, V
    Conte, TM
    Franzon, PD
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2005, 28 (02): : 288 - 297
  • [6] Chip-package codesign for high-frequency circuits and systems
    Lin, J
    IEEE MICRO, 1998, 18 (04) : 24 - 32
  • [7] Chip-package codesign for high-frequency circuits and systems
    Lin, Jenshan
    IEEE Micro, 18 (04): : 24 - 32
  • [8] New Simulation Procedure for Accurate Package Modeling Considering Chip-Package Interaction
    Seler, E.
    Wojnowski, M.
    Weigel, R.
    Hagelauer, A.
    2013 IEEE 22ND CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2013, : 43 - 46
  • [9] Chip-package codesign flow for mixed-signal SiP designs
    Brandtner, T
    IEEE DESIGN & TEST OF COMPUTERS, 2006, 23 (03): : 196 - 202
  • [10] Issues in chip-package codesign with MCM-D/flip-chip technology
    Franzon, P
    Schaffer, T
    Lipa, S
    Glaser, A
    IEEE SYMPOSIUM ON IC/PACKAGE DESIGN INTEGRATION - PROCEEDINGS, 1998, : 88 - 92
12345