Parasitic capacitance optimization of GaAsHBT class E power amplifier for high efficiency CDMA EER transmitter

被引：11
|
作者：
Kim, Ki Young [1 ]
Kim, Ji Hoon [1 ]
Park, Sung Min [1 ]
Park, Chul Soon [1 ]
机构：
[1] Informat & Commun Univ, Sch Engn, 119 Munjiro, Taejon 305732, South Korea
来源：
2007 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS | 2007年
关键词：
class E; hetero-junction bipolar transistor; monolithic microwave integrated circuit; power amplifier;
D O I：
10.1109/RFIC.2007.380987
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A Class E power amplifier (PA) for a CDMA EER transmitter is implemented with GaAs HBT technology. This paper demonstrates an efficiency improvement with a parasitic capacitance compensation circuit. In order to obtain high output power, the PA needs the large emitter size of a main transistor. The larger the emitter size, the higher the parasitic capacitance should be. In particular, the parasitic C-BE affects a distortion of the input voltage signal and decreases the PA's efficiency. Using the compensation circuit, we obtain 7% collector efficiency improvement at a similar output power level. This PA exhibits output power of 29dBm and collector efficiency of 71% at 1.9GHz.
引用
收藏
页码：733 / +
页数：2
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