On-chip Test Acceleration for Advanced Technologies

被引：0
|
作者：
Yang, Shenzhi [1 ]
Lan, Fan [1 ]
Pan, Weiwei [1 ]
Yang, Ludan [1 ]
Zheng, Yongjun [1 ]
机构：
[1] Semitronix Inc, Hangzhou, Zhejiang, Peoples R China
来源：
2021 5TH IEEE ELECTRON DEVICES TECHNOLOGY & MANUFACTURING CONFERENCE (EDTM) | 2021年
关键词：
addressable test chip; on-chip acceleration;
D O I：
10.1109/EDTM50988.2021.9420929
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel on-chip test acceleration method was developed to speed up addressable test chip measurements. Co-optimized with tester hardware, a sustained test speed of up to 40,000 items per second was achieved, corresponding to 30X of a traditional test setup. This method was employed to address critical test challenges during both technology development and mass production phases of advanced technologies.
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页数：3
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