Key aspects on ESD protection design for ICs: Mixed-mode simulation and RF/mixed-signal ESD

被引:0
|
作者
Wang, A [1 ]
Feng, H [1 ]
Chen, G [1 ]
Zhan, R [1 ]
Xie, H [1 ]
Wu, Q [1 ]
Guan, X [1 ]
机构
[1] IIT, Dept ECE, Chicago, IL 60616 USA
来源
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2003年
关键词
RF ESD protection; mixed-mode;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper reviews the key aspects in on-chip ESD (electrostatic discharge) protection circuitry design. The mixed-mode ESD Simulation-design methodology is discussed to address the design prediction task. New challenges in ESD protection design for RF/mixed-Signal ICs are discussed that include the complex ESD-circuit interactions, RF ESD protection characterization and hill-chip ESD protection solutions.
引用
收藏
页码:1000 / 1005
页数:6
相关论文
共 50 条
  • [1] An ESD protection circuit for mixed-signal ICs
    Feng, HG
    Gong, K
    Wang, AZ
    PROCEEDINGS OF THE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2001, : 493 - 496
  • [2] Analysis and design of distributed ESD protection circuits for high-speed mixed-signal and RF ICs
    Ito, C
    Banerjee, K
    Dutton, RW
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (08) : 1444 - 1454
  • [3] A mixed-mode ESD protection circuit simulation-design methodology
    Feng, HG
    Chen, G
    Zhan, RY
    Wu, Q
    Guan, XK
    Xie, HL
    Wang, AZH
    Gafiteanu, R
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (06) : 995 - 1006
  • [4] Mixed-mode ESD protection circuit simulation-design methodology
    Feng, H
    Wu, Q
    Chen, G
    Guan, X
    Xie, H
    Wang, AZ
    Zhan, R
    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY, 2003, : 652 - 655
  • [5] ESD Protection for Mixed-Signal Circuits - Design or Test Problem?
    Lubana, Sumanjit Singh
    Sarbishaei, Hossein
    Sachdev, Manoj
    2008 IEEE 14TH INTERNATIONAL MIXED-SIGNALS, SENSORS, AND SYSTEMS TEST WORKSHOP, 2008, : 103 - 108
  • [6] ESD Design Verification Aided by Mixed-Mode Multiple-Stimuli ESD Simulation
    Di, Mengfu
    Pan, Zijin
    Li, Cheng
    Wang, Albert
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2021, 9 : 1194 - 1201
  • [7] ESD protection design optimization using a mixed-mode simulation and its impact on ESD protection design of power bus line resistance
    Hayashi, H
    Kuroda, T
    Kato, K
    Fukuda, K
    Baba, S
    Fukuda, Y
    SISPAD: 2005 International Conference on Simulation of Semiconductor Processes and Devices, 2005, : 99 - 102
  • [8] A 3D mixed-mode ESD protection circuit simulation-design methodology
    Xie, H
    Zhan, R
    Feng, H
    Chen, G
    Wang, A
    Gafiteanu, R
    PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2004, : 243 - 246
  • [9] Design and Analysis of Full-Chip HV ESD Protection in BCD30V for Mixed-Signal ICs
    Wang, Shijun
    Yao, Fai
    Wang, Li
    Ma, Rui
    Zhang, C.
    Dong, Z. Y.
    Wang, Albert
    Shi, Zitao
    Cheng, Yuhua
    Chi, Baoyong
    Ren, Tianling
    2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 1059 - 1062
  • [10] VerifyESD: A tool for efficient circuit level ESD simulations of mixed-signal ICs
    Baird, M
    Ida, R
    ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, 2000, 2000, : 465 - 469