Area-power efficient lifting-based DWT hardware for implantable neuroprosthetics

被引：1

作者：

Kamboh, Awais M. ^{[1
]}

Raetz, Matthew ^{[1
]}

Mason, Andrew ^{[1
]}

Oweiss, Karim ^{[1
]}

机构：

[1] Michigan State Univ, E Lansing, MI 48824 USA

来源：

2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年

关键词：

D O I：

10.1109/ISCAS.2007.377936

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Discrete wavelet transform (DWT) has been shown to provide exceptionally efficient data compression for neural records. This paper describes an area-power minimized hardware implementation of the lifting scheme for multi-level, multi-channel DWT. Performance tradeoffs and key design decisions for implantable neuroprosthetics are analyzed. A 32-channel, 4-level version of the circuit has been custom designed in 0.18 mu m CMOS and occupies only 0.16mm(2).

引用

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页码：2371 / 2374

页数：4

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