Low power design of an acoustic echo canceller GMDFα algorithm on dedicated VLSI architectures

被引：1
|
作者：
Gailhard, S
Julien, N
Baganne, A
Martin, E
机构：
来源：
NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS | 1999年
关键词：
D O I：
10.1109/GLSV.1999.757447
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The acoustic echo cancellation with adaptive filters is a computationally intensive problem that needs real time cost effective solutions for embedded systems. Low Power optimized signal processing architectures are likely to provide such solutions in the future. In this paper, we present different real-time optimized architectures of the popular Gmdf alpha algorithm, obtained by a HLS CAD tool providing trade-off between area and power dissipation.
引用
收藏
页码：334 / 335
页数：2
相关论文
共 50 条
  • [21] A Co-Design Methodology for Telecommunication Systems: A Case Study of an Acoustic Echo Canceller
    A. Baganne
    J.L. Philippe
    E. Martin
    Journal of VLSI signal processing systems for signal, image and video technology, 1999, 22 : 21 - 29
  • [22] A co-design methodology for telecommunication systems: A case study of an acoustic echo canceller
    Baganne, A
    Philippe, JL
    Martin, E
    SIPS 97 - 1997 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 1997, : 273 - 282
  • [23] SSB subband echo canceller using low-order projection algorithm
    Makino, S
    Noebauer, J
    Haneda, Y
    Nakagawa, A
    1996 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, CONFERENCE PROCEEDINGS, VOLS 1-6, 1996, : 945 - 948
  • [24] A co-design methodology for telecommunication systems: A case study of an acoustic echo canceller
    Baganne, A
    Philippe, JL
    Martin, E
    JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1999, 22 (01): : 21 - 29
  • [25] LOW-POWER VLSI DESIGN
    ROY, K
    CHATTERJEE, A
    IEEE DESIGN & TEST OF COMPUTERS, 1994, 11 (04): : 6 - 7
  • [26] Low-power VLSI decoder architectures for LDPC codes
    Mansour, MM
    Shanbhag, NR
    ISLPED'02: PROCEEDINGS OF THE 2002 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2002, : 284 - 289
  • [27] A subband acoustic echo canceller using the NLMS algorithm with quasi-orthonormal initialization scheme
    Chen, HC
    Chen, OTC
    APCCAS '98 - IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: MICROELECTRONICS AND INTEGRATING SYSTEMS, 1998, : 331 - 334
  • [28] Reduced bit low power VLSI architectures for motion estimation
    Agha, Shahrukh
    Khan, Shahid
    Malik, Shahzad
    Riaz, Raja
    JOURNAL OF SYSTEMS ENGINEERING AND ELECTRONICS, 2013, 24 (03) : 382 - 399
  • [29] Reduced bit low power VLSI architectures for motion estimation
    Shahrukh Agha
    Shahid Khan
    Shahzad Malik
    Raja Riaz
    JournalofSystemsEngineeringandElectronics, 2013, 24 (03) : 382 - 399
  • [30] A comparative analysis for low power motion estimation VLSI architectures
    Elgamel, MA
    Shams, AM
    Bayoumi, MA
    2000 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 2000, : 149 - 158
12345