A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-μm CMOS

被引：0

作者：

Chou, Chien-Jung ^{[1
]}

Kuo, Bing-Jye ^{[1
]}

Chen, Li-Guang ^{[1
]}

Hsiao, Po-Yun ^{[1
]}

Lin, Tsung-Hsien ^{[1
]}

机构：

[1] Natl Taiwan Univ, Grad Inst Elect Engn, Dept Elect Engn, Taipei 10764, Taiwan

来源：

2010 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AUTOMATION AND TEST (VLSI-DAT) | 2010年

关键词：

INSTRUMENTATION AMPLIFIER; OFFSET;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a 1-V and low-noise readout front-end for biomedical applications. The key to this low-voltage and low-power operation is the current-mode instrumentation amplifier (CMIA). To reject the DC offset, an active-RC integrator with the subthreshold-biased PMOS as high resistance is included in the CMIA and forms the offset cancellation loop. The nested-chopper technique is applied to reduce the flicker noise and improve the common-mode rejection ratio (CMRR). A proposed third-order G(m)-C low-pass filter (LPF) is incorporated to remove the modulated noise by the choppers. Furthermore, a digitally programmable gain stage is incorporated to provide adjustable gain range for the readout front-end. The overall readout front-end has a bandwidth of 140 Hz and achieves 125-dB CMRR, 90-dB power-supply rejection ratio (PSRR), and 6-nV/rtHz input-referred noise density. The readout front-end is fabricated in a 0.18-mu m CMOS process. Total power consumption is 182 mu W from a 1-V supply.

引用

页码：295 / 298

页数：4

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